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Part: IZ74LV32
Category:
Logic
-> Gates
Description: Quad 2-input OR GATE
Company: System Logic Semiconductor
Datasheet: Download IZ74LV32 datasheet File size : 522 kB
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TECHNICAL DATA
SL74LV32 Quad 2-Input OR Gate
The SL74LV32 is low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT32A. The SL74LV32 provides the 2-input AND function. · · · Optimized for Low Voltage applications: 1.2 to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Low Input Current
ORDERING INFORMATION SL74LV32N Plastic SL74LV32D SOIC IZ74LV32 Chip TA = -40° ÷ 125° C for all packages
PIN ASSIGNMENT LOGIC DIAGRAM
A1 B1 A2 B2 A3 B3 A4 B4
Y1
Y2
Y3
FUNCTION TABLE
Input A L L H H H - high level L - low level B L H L H Output Y = A*B L H H H
Y4
PIN 14 =VCC PIN 7 = GND
SLS
System Logic Semiconductor
1
SL74LV32
MAXIMUM RATINGS *
Symbol VCC IIK * IO * ICC IGND PD Tstg TL
* 1 2
Parameter DC supply voltage (Referenced to GND) DC input diode current DC output diode current DC output source or sink current -bus driver outputs DC VCC current for types with - bus driver outputs DC GND current for types with - bus driver outputs Power dissipation per package, plastic DIP+ SOIC package+ Storage temperature Lead temperature, 1.5 mm from Case for 10 seconds (Plastic DIP ), 0.3 mm (SOIC Package)
Value -0.5 ÷ +5.0 ±20 ±50 ±25 ±50 ±50 750 500 -65 ÷ +150 260
Unit V mA mA mA mA mA mW °C °C
IOK *
3
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 12 mW/°C from 70° to 125°C SOIC Package: : - 8 mW/°C from 70° to 125°C * 1: VI VCC+0.5V * 2: Vo VCC+0.5V * 3: -0.5V < Vo < VCC+0.5V
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT TA tr, t f Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Input Rise and Fall Time VCC =1.2 V VCC =2.0 V VCC =3.0 V VCC =3.6 V Min 1.2 0 -40 0 0 0 0 Max 3.6 VCC +125 1000 700 500 400 Unit V V °C ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
SLS
System Logic Semiconductor
2
SL74LV32
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol Parameter Test Conditions VCC, V 25°C min VIH High-Level Input Voltage 1.2 2.0 3.0 3.6 1.2 2.0 3.0 3.6 1.2 2.0 3.0 3.6 3.0 1.2 2.0 3.0 3.6 3.0 3.6 3.6 3.6 0.9 1.4 2.1 2.5 1.1 1.92 2.92 3.52 2.48 max 0.3 0.6 0.9 1.1 0.09 0.09 0.09 0.09 0.33 -0.1 0.1 2.0 Guaranteed Limit -40°C ÷ 85°C min 0.9 1.4 2.1 2.5 1.0 1.9 2.9 3.5 2.34 max 0.3 0.6 0.9 1.1 0.1 0.1 0.1 0.1 0.4 -1.0 1.0 20 -40°C ÷ 125°C min 0.9 1.4 2.1 2.5 1.0 1.9 2.9 3.5 2.20 max 0.3 0.6 0.9 1.1 0.1 0.1 0.1 0.1 0.5 -1.0 1.0 40 V Unit
VIL
Low -Level Input Voltage
V
VOH
High-Level Output VI = VIL or VIH Voltage IO = -50 µÀ
V
VI = VIL or VIH IO = -6.0 mÀ VOL Low-Level Output VI = VIL or VIH Voltage IO = 50 µÀ
V V
VI = VIL or VIH IO = 6.0 mÀ IIL IIÍ IÑÑ Low-Level Input Leakage Current VI = 0 V
V µA µA µA
High-Level Input VI = VCC Leakage Current Quiescent Supply VI = 0  or VCC Current IO = 0 µÀ (per Package)
SLS
System Logic Semiconductor
3
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