|
Details, datasheet, quote on part number:SL34118
| |
| Part: | SL34118 |
| Category: | Communication => Telephony => Codecs/Voice Codecs |
| Description: | Voice Switched Speakerphone Circuit |
| Company: | System Logic Semiconductor |
| Datasheet: | Download SL34118 datasheet File size : 140 kB |
| Request For quote: | Find where to buy SL34118
|
| |
Datasheet text preview:
SL34118
Voice Switched Speakerphone Circuit
The SL34118 Voice Switched Speakerphone Circuit incorporates the necessary amplifiers, attenuators, level detectors, and control algorithm to form the heart of a high quality hands-free speakerphone system. Included are a microphone amplifier with adjustable gain and MUTE control, Transmit and Receive attenuators which operate in a complementary manner, level detectors at both input and output of both attenuators, and background noise monitors for both the transmit and receive channels. A Dial Tone Detector prevents the dial tone from being attenuated by the Receive background noise monitor circuit. Also included are two line driver amplifiers which can be used to form a hybrid network in conjunction with an external coupling transformer. A high pass filter can be used to filter out 60 Hz noise in the reseive channel, or for other filtering functions. A Chip Disable pin permits powering down the entire circuit to conserve power on long loops where loop current is at a minimum. The SL34118 may be operated from a power supply, or it can be powered from the telephone line, requiring typically 5.0 mA. The SL34118 can be interfaced directly to Tip and Ring (through a coupling transformer) for stand-alone operation, or it can be used in conjunction with a handset speech network and or other features of a featurephone. · · · · · · · · Improved Attenuator Gain Range: 52 dB Between Transmit and Receive Low Voltage Operation for Line-Powered Applications (3.0-6.5 V) 4 Point Signal Sensing for Improved Sensitivity Background Noise Monitors for Both Transmit and Receive Paths Microphone Amplifier Gain Set by External Resistors - Mute Function Included Chip Disable for Active Standby Operation On Board Filter Pinned-Out for User Deined Function Dial Tone Detector to Inhibit Receive Idle Mode During Dial Tone Presence
ORDERING INFORMATION SL34118N Plastic SL34118D SOIC TA = -25° to 70° C for all packages
PIN ASSIGNMENT
SLS
System Logic Semiconductor
SL34118
SIMPLIFIED BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION INTRODUCTION
The fundamental difference between the operation of a speakerphone and a handset is that of halfduplex versus full-duplex. The handset is full duplex since conversation can occur in both directions (transmit and receive) simultaneousiy. A speakerphone has higher gain levels in both paths, and attempting to converse full duplex results in oscillatory problems due to the loop that exists within the system. The loop is formed by the receive and transmit paths, the hybrid, and the acoustic coupling (speaker to microphone). The only practical and economical solution used to data is to design the speakerphone to function in a half duplex mode - i.e., only one person speaks at a time, while the other listens. To achieve this requires a circuit which can detect who is talking, switch on the appropriate path (transmit or receive), and switch off (attenuate) the other path. In this way, the loop gain is maintained less than unity. When the talkers exchange function, the circuit must quickly detect this, and switch the circuit appropriately.By providing speech level detectors, the circuit operates in a "hand-free" mode, eliminating the need for a "push-to-talk" switch. The handset, by the way, has the same loop as the speakerphone. But since the gains are considerably lower, and since the acoustic coupling from the earpiece to the mouthpiece is almost nonexistent (the receiver is normally held against a person's ear), oscillations don't occur. The SL34118 provides the necessary level detectors, attenuators, and switching control for a properly operating speakerphone. The detection sensitivity and timing are externally controllable. Additionally, the SL34118 provides background noise monitors which make the circuit insensitive to room and line noise, hybrid amplifiers for interfacing to Tip and Ring, the microphone amplifier, and other associated functions.
ATTENUATORS
The transmit and receive attenuators are complementary in function, i.e., when one is at maximum gain (+6.0 dB), the other is at maximum attenuation (-46 dB), and vice versa. They are never both fully on or both fully off. The sum of their gains remains constant (within a nominal error band of ±0.1 dB) at a typical value of -40 dB. Their purpose is to control the transmit and receive paths to provide the half-duplex operation required in a speakerphone. The attenuators are non-inverting, and have a 3.0 dB (from max gain) frequency of 100 KHz. The input impedance of each attenuator (TXI and RXI) is nominally 10 k (see Figure 1), and the input signal should be limited to 350 mVrms (990 mVp-p) to prevent distortion. That maximum
SLS
System Logic Semiconductor
SL34118
recommended input signal is independent of the volume control setting. The diode clamp on the inputs limits the input swing, and therefore the maximum negative output swing. This is the reason for V XOL and V XOL specification being defined as R T they are in the Electrical Characteristics. The output impedance is <10 until the output current limit (typically 2.5 mA) is reached. Figure 1. Attenuator Input Stage the CT pin is at -240 millivolts with respect to V , the B circuit is in the transmit mode (transmit attenuator is at +6.0 dB). The circuit is in an idle mode when the CT voltage is equal to VB, causing the attenuators' gains to be halfway between their fully on and fully off positions ( 20 dB each). Monitoring the C voltage T (with respect to V ) is the most direct method of B monitoring the circuit's mode. The inputs to the Control Block are seven: 2 from the comp arators operated by the level detectors, 2 from the background noise monitors, the volume control, the dial-tone detector, and the AGC circuit. These seven inputs are described below.
LEVEL DETECTORS
The attenuators are controlled by the single output of the Control Block, which is measurable at the CT pin (Pin 14). When the CT pin is at +240 millivolts with respect to VB, the circuit is in the receive mode (receive attenuator is at +6.0 dB). When There are four level detectors - two on the receive side and two on the transmit side. Refer to Figure 2 - the terms in parentheses form one system, and the other terms form the second system
Figure 2. Level Detectors
Each level detector is a high gain amplifier with back-to-back diodes in the feedback path, resulting in non-linear gain, which permits operation over a wide dynamic range of speech levels. The sensitivity of each level detector is determined by the external resistor and capacitor at each input (TLI1, TLI2, RLI1, and RLI2). Each output charges an external capacitor through a diode and limiting resistor, thus providing a dc representation of the input ac signal
level. The outputs have a guick rise time (determined by the capacitor and an internal 350 resistor), and a slow decay time set by an internal current source and the capacitor. The capacitors on the four outputs should have the same value (±10%) to prevent timing problems. Referring to Figure 8, on the receive side, one level detector (RLI1) is at the receive input receiving the same signal as at Tip and Ring, and
SLS
System Logic Semiconductor
|
|
