Electrical and Electronics Engineering publications abstract of: 03-2017 sorted by title, page: 0

» $16times 100$ GHz Echelle Grating-Based Wavelength Multiplexer on Silicon-on-Insulator Platform
Abstract:
This letter reports on an Echelle grating demultiplexer for dense wavelength-division-multiplexing applications with 16 channels and 100 GHz channel spacing. The Echelle grating is designed and fabricated on a silicon-on-insulator platform with a silicon guiding layer of 300 nm. The measured insertion losses of the Echelle grating are lower than 2 dB for all channels and the crosstalk is below 15 dB. Error free transmission was obtained for all channels with negligible penalty.
Autors: X. Pommarede;K. Hassan;P. Billondeau;V. Hugues;P. Grosse;B. Charbonnier;G.-H. Duan;
Appeared in: IEEE Photonics Technology Letters
Publication date: Mar 2017, volume: 29, issue:6, pages: 493 - 495
Publisher: IEEE
 
» $H_{2}$ Optimal Coordination of Homogeneous Agents Subject to Limited Information Exchange
Abstract:
Controllers with a diagonal-plus-low-rank structure constitute a scalable class of controllers for multi-agent systems. Previous research has shown that diagonal-plus-low-rank control laws appear as the optimal solution to a class of multi-agent coordination problems, which arise in the control of wind farms. In this technical note we show that this result extends to the case where the information exchange between agents is subject to limitations. We also show that the computational effort required to obtain the optimal controller is independent of the number of agents and provide analytical expressions that quantify the usefulness of information exchange.
Autors: Daria Madjidian;Leonid Mirkin;Anders Rantzer;
Appeared in: IEEE Transactions on Automatic Control
Publication date: Mar 2017, volume: 62, issue:3, pages: 1424 - 1430
Publisher: IEEE
 
» $k$ -Connectivity in Random $K$ -Out Graphs Intersecting Erdős-Rényi Graphs
Abstract:
We investigate -connectivity in secure wireless sensor networks under the random pairwise key predistribution scheme with unreliable links. When wireless communication links are modeled as independent on-off channels, this amounts to analyzing a random graph model formed by intersecting a random -out graph and an Erdős-Rényi graph. We present conditions on how to scale the parameters of this intersection model so that the resulting graph is -connected with probability approaching to one (resp. zero) as the number of nodes gets large. The resulting zero-one law is shown to improve and sharpen the previous result on the 1-connectivity of the same model. We also provide numerical results to support our analysis.
Autors: Faruk Yavuz;Jun Zhao;Osman Yağan;Virgil Gligor;
Appeared in: IEEE Transactions on Information Theory
Publication date: Mar 2017, volume: 63, issue:3, pages: 1677 - 1692
Publisher: IEEE
 
» 100-MHz GaN-HEMT Class-G Supply Modulator for High-Power Envelope-Tracking Applications
Abstract:
In this paper, a highly efficient class-G supply modulator targeting high-power wideband envelope tracking applications is presented. The maximum output power using a 50% duty cycle at 100-MHz switching frequency is 62 W for a switching between 30 and 50 V delivered in a 25- load. The modulator including its driver circuit reaches an overall efficiency in the range of 97%–88% for switching frequencies from dc to 100 MHz for passive loads in a wide range. The modulator is designed to operate at various supply voltage levels and is evaluated within the range from 20 to 50 V while powering loads from 25 to 100 . The modulator is characterized in terms of efficiency, switching frequency, and nonlinearities.
Autors: Nikolai Wolff;Wolfgang Heinrich;Olof Bengtsson;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Mar 2017, volume: 65, issue:3, pages: 872 - 880
Publisher: IEEE
 
» 2-D Analytical Modeling of the Electrical Characteristics of Dual-Material Double-Gate TFETs With a SiO2/HfO2 Stacked Gate-Oxide Structure
Abstract:
A physics-based 2-D analytical model for surface potential, electric field, drain current, subthreshold swing (SS) and threshold voltage of dual-material (DM) double-gate tunnel FETs (DG TFETs) with SiO2/HfO2 stacked gate-oxide structure has been developed in this paper. The parabolic-approximationtechnique, with suitable boundary conditions, has been used to solve Poisson’s equation in the channel region. Channel potential model is used to develop electric field expression. The drain current expression is extracted by analytically integrating the band-to-band tunneling generation rate over the channel thickness. Threshold voltage has been extracted by maximum transconductance method. The proposed model also demonstrates that the proper choice of work function for both the latterly contacting gate electrode (near the source and drain) materials which can give better results in terms of input-output characteristics, SS, and than the conventional TFET devices. Although the proposed model has been primarily developed for Si-channel-based DM DG TFET devices, however, the model has also been shown to be applicable for other materials like SiGe (indirect bandgap) and InAs channel-based TFET structures. The results of the proposed model have been validated against the TCAD simulation results obtained by using SILVACO ATLAS device simulation software.
Autors: Sanjay Kumar;Ekta Goel;Kunal Singh;Balraj Singh;Prince Kumar Singh;Kamalaksha Baral;Satyabrata Jit;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Mar 2017, volume: 64, issue:3, pages: 960 - 968
Publisher: IEEE
 
» 2-D Analytical Threshold Voltage Model for Dielectric Pocket Double-Gate Junctionless FETs by Considering Source/Drain Depletion Effect
Abstract:
This paper proposes an analytical threshold voltage model for the dielectric pocket double gate (DP-DG) junctionless FETs (JLFETs). The channel potential function has been obtained by solving 2-D Poisson’s equation using an evanescent mode analysis with suitable boundary conditions. The potential function has then been used for modeling the threshold voltage to investigate the effects of the DP thickness and length on the short-channel effects of the structure. The effects of source and drain depletion regions have been included for improving the accuracy of the model. The model results of DP-DG JLFETs have been compared with the simulation data obtained from the 2-D TCAD ATLAS device simulator.
Autors: Balraj Singh;Deepti Gola;Kunal Singh;Ekta Goel;Sanjay Kumar;Satyabrata Jit;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Mar 2017, volume: 64, issue:3, pages: 901 - 908
Publisher: IEEE
 
» 2.4-GHz $Q$ -Enhanced Lumped Ring Filter With Two Transmission Zeros Using 0.18- $mu$ m SiGe BiCMOS Process
Abstract:
A 2.4-GHz Q-enhanced lumped ring filter with a narrow bandpass response and two stopband-rejection transmission zeros using 0.18- SiGe BiCMOS technology is demonstrated in this letter. A transformer-based Q-enhanced technique is employed to boost the Q-factor of on-chip inductors for low passband insertion loss. The measured results show zero dB insertion loss, 120-MHz 3-dB bandwidth for the passband centered at 2.45 GHz and with two transmission zeros at 2.35 and 2.65 GHz, respectively. The noise figure is about 14.5 dB, IP1dB is about −15.2 dBm and IIP3 is about −4.5 dBm, respectively. The total current consumption is 9.9 mA at 1.8 V supply voltage.
Autors: Yu-Chih Hsiao;Chinchun Meng;Shih-Te Yang;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Mar 2017, volume: 27, issue:3, pages: 305 - 307
Publisher: IEEE
 
» 2016 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications [Conference Reports]
Abstract:
Presents information on the 2016 IEEE MTT-S International Microwave Workshop Series on Advanced Materials and Processes for RF and THz Applications.
Autors: Yong Fan;Yu Jian Cheng;Zi Xuan Huang;
Appeared in: IEEE Microwave Magazine
Publication date: Mar 2017, volume: 18, issue:2, pages: 100 - 102
Publisher: IEEE
 
» 2016 Reviewers for IEEE Transactions on Network and Service Management
Abstract:
The success and quality of this journal critically depends on the dedication and expertise of a large number of reviewers. On behalf of the Editorial Board, I would like to thank them for their excellent work.
Autors: Rolf Stadler;
Appeared in: IEEE Transactions on Network and Service Management
Publication date: Mar 2017, volume: 14, issue:1, pages: 2 - 7
Publisher: IEEE
 
» 3D Catheter Shape Determination for Endovascular Navigation Using a Two-Step Particle Filter and Ultrasound Scanning
Abstract:
In endovascular catheter interventions, the determination of the three-dimensional (3D) catheter shape can increase navigation information and help reduce trauma. This study describes a shape determination method for a flexible interventional catheter using ultrasound scanning and a two-step particle filter without X-ray fluoroscopy. First, we propose a multi-feature, multi-template particle filter algorithm for accurate catheter tracking from ultrasound images. Second, we model the mechanical behavior of the catheter and apply a particle filter shape optimization algorithm to refine the results from the first step. Finally, the acquired catheter’s 3D shapes are displayed together with the preoperative 3D images of the cardiac structures to provide intuitive endovascular navigation. We validated our method using ultrasound scanning of the straight and curved catheters in a water tank, and the shape determination errors were 1.44 ± 0.38 mm and 1.95 ± 0.46 mm, respectively. Further, endovascular catheter shape determination was validated in a catheter intervention experiment with a heart phantom. The error of the acquired endovascular catheter shape was 2.23 ± 0.87 mm. These results demonstrate that our two-step method is both accurate and effective. Using ultrasound scanning for shape determination of a flexible catheter will be helpful in endovascular interventions, reducing exposure to radiation and providing rich navigation information.
Autors: Fang Chen;Jia Liu;Hongen Liao;
Appeared in: IEEE Transactions on Medical Imaging
Publication date: Mar 2017, volume: 36, issue:3, pages: 685 - 695
Publisher: IEEE
 
» 5G Converged Cell-Less Communications in Smart Cities
Abstract:
Ubiquitous information service converged by different types of heterogeneous networks is one of fundamental functions for smart cities. Considering the deployment of 5G ultra-dense wireless networks, 5G converged cell-less communication networks are proposed to support mobile terminals in smart cities. To break obstacles of heterogeneous wireless networks, the 5G converged cell-less communication network is vertically converged in different tiers of heterogeneous wireless networks and horizontally converged in celled architectures of base stations/ access points. Moreover, the software defined network controllers are configured to manage the traffic scheduling and resource allocation in 5G converged cell-less communication networks. Simulation results indicate the coverage probability and the energy saving at both base stations and mobile terminals are improved by the cooperative grouping scheme in 5G converged cell-less communication networks.
Autors: Tao Han;Xiaohu Ge;Lijun Wang;Kyung Sup Kwak;Yujie Han;Xiong Liu;
Appeared in: IEEE Communications Magazine
Publication date: Mar 2017, volume: 55, issue:3, pages: 44 - 50
Publisher: IEEE
 
» 5G Worldwide Developments [Mobile Radio]
Abstract:
Huawei and NTT DOCOMO announced what they claim is the world's first fifth-generation (5G), large-scale field trial in the 4.5-GHz band using new numerology and frame structure complying with the Third Generation Partnership Project (3GPP) 5G New Radio (NR) current agreements. In the trial, 11.29 Gb/s total user throughput and less than 0.5 ms one-way user plane latency were achieved in the macrocell coverage of a real urban application scenario in Yokohama, Japan. The macrocell was made up of one base station that worked in the 4.5-GHz band with 200-MHz bandwidth, 64 transceivers, and 23 pieces of user equipment (UE) of both static and mobile types. The trial combined multiuser (MU), multiple-input, multiple-output (MIMO) technology for simultaneous multiple access and a precoding algorithm that optimizes signals for maximized performance and also limits interuser interference. It achieved a MU-MIMO transmission of a maximum 79.82 b/s/Hz/cell.
Autors: Javier Gozalvez;
Appeared in: IEEE Vehicular Technology Magazine
Publication date: Mar 2017, volume: 12, issue:1, pages: 4 - 11
Publisher: IEEE
 
» 9/12 2-D Modulation Code for Bit-Patterned Media Recording
Abstract:
This paper presents a 9/12 2-D modulation code to overcome 2-D interference effects in bit-patterned media recording (BPMR) systems. Next-generation storage systems that are challenged by the superparamagnetic effect require new technologies to be developed, and for magnetic recording, BPMR technology is regarded to be one of the most promising candidates to extend area density beyond 1 Tb/in2. BPMR systems not only help to reduce transition noise and non-linear bit shift, but they also simplify the tracking operation. Nevertheless, some challenges arise for BPMR systems from a signal processing point of view. One of the primary challenges in the systems is the 2-D interference due to the effects of both the along- and across-track intersymbol interference. Moreover, the effect of media noise and the physical limits of the electromechanical components also negatively impact the system performance. The proposed modulation code converts 9 b sequences of user data into 2-D output codewords in 6-by-2 arrays to avoid fatal interference as much as possible, and a reasonable Hamming distance is also ensured for the codeword set. The proposed code achieves gains of about 2 and 1 dB over a system without encoding and a system with 6/8 modulation coding at the same code rate, respectively. Moreover, the performance of the 9/12 2-D modulation codes according to the different array sizes is also investigated.
Autors: Chi Dinh Nguyen;Jaejin Lee;
Appeared in: IEEE Transactions on Magnetics
Publication date: Mar 2017, volume: 53, issue:3, pages: 1 - 7
Publisher: IEEE
 
» In Situ Error Detection Techniques in Ultralow Voltage Pipelines: Analysis and Optimizations
Abstract:
In order to achieve high tolerance against process, voltage, and temperature variations in the ultralow voltage (ULV) circuits, in situ error detection and correction (EDAC) techniques were presented. However, circuits adding the capability of error detection incur large hardware overhead, especially in ULV due to larger delay variability. In this paper, we analyze the hardware overhead of error detection techniques in pipelines based on three different sequential elements: flip-flops, two-phase latches, and pulsed latches. By exploiting the cycle-borrowing ability, we propose a technique called sparse insertion of error detecting registers on the two-phase latch-based and pulsed-latch-based pipelines to reduce the sequential logic area. Furthermore, we propose a delay-padding methodology using a multi- cell library in ULV circuits to reduce EDAC hardware overhead. The proposed techniques are applied on a benchmark six-stage pipeline operating at 0.35 V in a 65-nm CMOS. The analysis results show that our proposed techniques can reduce the total area by 26%–33% and the error detecting register count by 2.9– compared with conventional EDAC techniques.
Autors: Wei Jin;Seongjong Kim;Weifeng He;Zhigang Mao;Mingoo Seok;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Mar 2017, volume: 25, issue:3, pages: 1032 - 1043
Publisher: IEEE
 
» A +12-dBm OIP3 60-GHz RF Downconversion Mixer With an Output-Matching, Noise- and Distortion-Canceling Active Balun for 5G Applications
Abstract:
A CMOS millimeter-wave (mmWave) downconversion mixer with a local-oscillator (LO) buffer is proposed for wireless Gb/s data-transfer enabling systems, such as 5G systems. To obtain high linearity at low supply voltages, the proposed mmWave downconversion mixer adopts an on-chip transformer-based topology. In order to achieve differential to single-ended conversion and IF output matching, while maintaining a high linearity performance, the proposed mmWave downconversion mixer incorporates an active balun with common-source and common-drain configurations employing common-mode noise and third-order intermodulation distortion cancellations. The proposed downconversion mixer with active balun and LO buffer was implemented using a 65-nm CMOS process and it draws 18 mA from a 1 V supply voltage. It demonstrates a gain greater than 5.6 dB, noise figure less than 10.9 dB, and third-order output intercept point more than 12.4 dBm, in the band from 57 to 66 GHz.
Autors: Chihoon Choi;Ju Ho Son;Ockgoo Lee;Ilku Nam;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Mar 2017, volume: 27, issue:3, pages: 284 - 286
Publisher: IEEE
 
» A 0.1–2-GHz Quadrature Correction Loop for Digital Multiphase Clock Generation Circuits in 130-nm CMOS
Abstract:
A 100-MHz–2-GHz closed-loop analog in-phase/ quadrature correction circuit for digital clocks is presented. The proposed circuit consists of a phase-locked loop- type architecture for quadrature error correction. The circuit corrects the phase error to within a 1.5° up to 1 GHz and to within 3° at 2 GHz. It consumes 5.4 mA from a 1.2 V supply at 2 GHz. The circuit was designed in UMC 0.13- mixed-mode CMOS with an active area of . The impact of duty cycle distortion has been analyzed. High-frequency quadrature measurement related issues have been discussed. The proposed circuit was used in two different applications for which the functionality has been verified.
Autors: Immanuel Raja;Vishal Khatri;Zaira Zahir;Gaurab Banerjee;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Mar 2017, volume: 25, issue:3, pages: 1044 - 1053
Publisher: IEEE
 
» A 0.2–1.45-GHz Subsampling Fractional- $N$ Digital MDLL With Zero-Offset Aperture PD-Based Spur Cancellation and In Situ Static Phase Offset Detection
Abstract:
A digital fractional- subsampling multiplying delay-locked loop is proposed in this paper. A zero phase-offset latch-based aperture phase detector is introduced in a reference spur cancellation loop to precisely cancel any static phase offset (SPO) between the injected reference and the digitally controlled oscillator (DCO) phases. An in situ detection scheme is employed to directly measure this phase offset accurately by obviating the requirement of a high-speed off-chip measurement setup. Moreover, a mathematical expression is derived for the calculation of reference spur generated from a given SPO. A uniformly distributed switched capacitor-based DCO frequency tuning achieves highly linear gain. The chip prototype is fabricated in a 1.2-V supply, 65-nm LP CMOS technology and covers an output frequency range of 0.2–1.45 GHz while occupying a core area of 0.054 mm2. Measured phase noise at 1.4175 GHz is −95 dBc/Hz at 100-kHz offset, which is 9 dB lower than in phase-locked loop mode of operation.
Autors: Somnath Kundu;Bongjin Kim;Chris H. Kim;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 799 - 811
Publisher: IEEE
 
» A 0.3 V 10-bit SAR ADC With First 2-bit Guess in 90-nm CMOS
Abstract:
This paper presents the design and implementation of a 10-bit ultra-low voltage energy-efficient successive approximation register (SAR) analog-to-digital converter (ADC). The proposed first 2-bit guess (F2G) scheme reduces the DAC switching energy by 90% and improves the DNL and INL by in theory compared with the conventional approach. By employing majority-vote comparison at the conversions of LSBs, the noise requirement of comparator can be relaxed by half. With the segmented and bundled routing, the parasitic capacitors of bottom-plates of DAC array are reduced to improve power efficiency and speed. Implemented in 90-nm CMOS technology, the test chip occupied a core area of 0.03 mm2. The prototype consumes 67.3 nW at 150 kS/s from a single 0.3 V supply voltage and achieves an ENOB of 8.85 bits and an SFDR of 70.7 dB at Nyquist input, respectively. The resultant Walden’s FoM and Schreier’s FoM are 0.97 fJ/conv.-step and 175.5 dB, respectively.
Autors: Jin-Yi Lin;Chih-Cheng Hsieh;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Mar 2017, volume: 64, issue:3, pages: 562 - 572
Publisher: IEEE
 
» A 0.5 V 5.96-GHz PLL With Amplitude-Regulated Current-Reuse VCO
Abstract:
This letter proposes an ultralow-power 5.96-GHz phase-locked loop (PLL) with a current-reuse VCO under low supply voltage of 0.5 V. While the current-reuse VCO can achieve lower power consumption, it has the drawback of amplitude-imbalance of differential outputs due to its asymmetric structure. Proposed amplitude regulation technique utilizes only one capacitor at the center-tap of the inductor, which does not require additional power consumption. The proposed PLL was fabricated in a 65-nm CMOS process. It achieved phase noise of −129 dBc/Hz at 10-MHz offset. Total power consumption was 0.69 mW under 0.5 V supply voltage.
Autors: Sho Ikeda;Sang_yeop Lee;Hiroyuki Ito;Noboru Ishihara;Kazuya Masu;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Mar 2017, volume: 27, issue:3, pages: 302 - 304
Publisher: IEEE
 
» A 0.95-mW 6-b 700-MS/s Single-Channel Loop-Unrolled SAR ADC in 40-nm CMOS
Abstract:
This brief presents a low-power and high-speed single-channel successive approximation register (SAR) analog-to-digital converter (ADC). It uses a loop-unrolled architecture with multiple comparators. Each comparator is used not only to make a comparison but also to store its output and generate an asynchronous clock to trigger the next comparator. The SAR logic is significantly simplified to increase speed and reduce power. The comparator offset and decision time are optimized with a bidirectional single-side switching technique by controlling the input common-mode voltage . To remove the nonlinearity due to the comparators' offset mismatch, a simple and effective - adaptive offset calibration technique is proposed. The prototype ADC in 40-nm CMOS achieves a 35-dB signal to noise-plus-distortion ratio and a 48-dB spurious-free dynamic range at a 700-MS/s sampling rate. It consumes 0.95 mW, leading to a Walden figure-of-merit (FOM) of 30 fJ/conversion-step and a Schreier FOM of 153.4 dB.
Autors: Long Chen;Kareem Ragab;Xiyuan Tang;Jeonggoo Song;Arindam Sanyal;Nan Sun;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Mar 2017, volume: 64, issue:3, pages: 244 - 248
Publisher: IEEE
 
» A 103.125-Gb/s Reverse Gearbox IC in 40-nm CMOS for Supporting Legacy 10- and 40-GbE Links
Abstract:
This paper presents the first 103.125-Gb/s multilink gearbox (MLG) IC, which facilitates the transport of independent 10- and 40-GbE signals to Gb/s physical layers, such as 100GBASE-xR4. The IC consumes only 1.37 W while implementing complicated reverse gearbox functionality. The measured TX jitter from 10- and 25-G lanes is 0.407 and 0.448 psrms, respectively. The measured input sensitivities for a BER of of the 10- and 25-G RXs are 20 and 42 mVppd, respectively. The proposed gearbox IC, fabricated in a 40-nm CMOS process, occupies mm2. The power consumption of RX and TX in a 25-G interface is 50.9 and 52 mW, respectively, and those of a 10-G interface are 29 and 24.4 mW, respectively. MLG functionality is verified using embedded self-test logics.
Autors: Taehun Yoon;Joon-Yeong Lee;Jinhee Lee;Kwangseok Han;Jeong-Sup Lee;Sangeun Lee;Taeho Kim;Jinho Han;Hyosup Won;Jinho Park;Hyeon-Min Bae;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 688 - 703
Publisher: IEEE
 
» A 2.4–3.6-GHz Wideband Subharmonically Injection-Locked PLL With Adaptive Injection Timing Alignment Technique
Abstract:
This paper proposes a wideband subharmonically injection-locked PLL (SILPLL) with adaptive injection timing alignment technique. The SILPLL includes three main circuit blocks: one-oscillator-period constant-delay (OOPCD) divider, timing-adjusted phase detector (TPD), and pulse generator (PG). The proposed injection timing alignment technique can align the injection timing adaptively in a wide range of the output clock frequency using the two blocks (OOPCD and TPD) and a falling edge locking scheme of pulses. It can avoid the risk that SILPLL may lock to the wrong frequency or even fail to lock. The PG block is used for half-integral injection to relax the tradeoff between the phase noise of SILPLL and the output frequency resolution. The OOPCD circuit occupies a negligible area. After the injection timing alignment is finished, the OOPCD is powered off so that no extra power is consumed. The SILPLL is implemented in the 65-nm 1P9M CMOS process. It consumes 8.6 mW at 1.2 V supply and occupies an active core area of mm2. The measured output frequency range is 2.4~3.6 GHz with an output frequency resolution of 200 MHz and the phase noise is −127.6 dBc/Hz at an offset of 1 MHz from a carrier frequency of 3.4 GHz. The rms jitter integrated from 1 kHz to 30 MHz is less than 112 fs for all the covered frequency points. Under the supply voltage range from 1.1 to 1.3 V and the temperature range from −20 °C to 70 °C, the rms jitter variation of all the covered frequency points is less than 27 fs, which shows good robustness over environmental variation.
Autors: Zhao Zhang;Liyuan Liu;Peng Feng;Nanjian Wu;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Mar 2017, volume: 25, issue:3, pages: 929 - 941
Publisher: IEEE
 
» A 2.5 GHz Low Power, High- ${Q}$ , Reliable Design of Active Bandpass Filter
Abstract:
In this paper, a variation-aware and reliable design of a fully integrated radio frequency (RF) bandpass filter realized using a voltage differencing transconductance amplifier is presented. The filter is characterized by its high frequency operation, low power consumption, high quality factor, and it is insensitive to process, voltage, and temperature variations. Sensitivity analysis has been performed to analyze the circuit performance in the presence of parasitics. The inductor-less approach finds its application in integrated building blocks of RF front ends, thus eliminating the requirement of off-chip filters in transceivers. Centered at 2.511 GHz and operating within the 36.21 MHz 3-dB bandwidth, the filter draws 0.168 mA from a ±1 V power supply, attains a voltage gain of 72.6 dB, a quality factor of 69.34 and noise figure of ~29.6 dB. In addition, it has a dynamic range of 125.84 dB-Hz and a 1-dB compression of −1.5 dBm which translates into a figure of merit as high as 94 dB.
Autors: Vikash Kumar;Rishab Mehra;Aminul Islam;
Appeared in: IEEE Transactions on Device and Materials Reliability
Publication date: Mar 2017, volume: 17, issue:1, pages: 229 - 244
Publisher: IEEE
 
» A 210-GHz SiGe Balanced Amplifier for Ultrawideband and Low-Voltage Applications
Abstract:
This letter presents a low-voltage balanced amplifier for millimeter-wave radio systems. An ultrawideband of operation is demonstrated from 155 to 210 GHz, which corresponds to a 30% relative bandwidth. Over this band, the system provides 10-dB gain for a power consumption of only 16.8 mW. For the employed 0.8 V voltage supply, the large-signal characterizations demonstrated a maximum iP of −17.1 dBm and oP of −10.2 dBm. The measured input and output return losses are above 10 and 20 dB for the whole band. The described features are enabled by the balanced common-base architecture, the ad hoc designed multistub matching networks, and the employed high performance 450-GHz SiGe BiCMOS fabrication technology. The realized amplifier compares well against reported SiGe BiCMOS designs operating above 200 GHz by showing the widest demonstrated bandwidth as well as the lowest voltage supply and power consumption.
Autors: Paolo Valerio Testa;Corrado Carta;Bernhard Klein;Ronny Hahnel;Dirk Plettemeier;Frank Ellinger;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Mar 2017, volume: 27, issue:3, pages: 287 - 289
Publisher: IEEE
 
» A 25 Gb/s 1.13 pJ/b −10.8 dBm Input Sensitivity Optical Receiver in 40 nm CMOS
Abstract:
This paper describes the design of a 25 Gb/s energy-efficient CMOS optical receiver with high input sensitivity. By incorporating a current-boosting preamplifier with a dual-path time-interleaved integrating-type optical receiver, it provides 1:2 demultiplexing operation with a tolerance to lower bandwidth photodiodes. The bandwidth of current amplifier is chosen as operating data rate for maximizing the receiver signal-to-noise ratio. Experimental results show that the receiver can achieve 25 Gb/s operation when integrated with a 9 or 17 GHz GaAs photodiode. Input sensitivities in the two cases are −7.2 dBm (w/i a 9 GHz photodiode) and −10.8 dBm (w/i a 17 GHz photodiode), respectively, for a bit error rate of less than . In addition, a single-tap decision-feedback equalizer (DFE) is embedded to compensate photodiode bandwidth and improve input sensitivity. Integrated with a low-cost 9 GHz photodiode, the input sensitivity and timing margin of the receiver are improved by 2 dB and 0.25 UI, respectively, after DFE compensation. By utilizing a current integrator and time-interleaved comparators, its energy efficiency is 1.13 pJ/b at 25 Gb/s under a 1.2 V power supply. Fabricated in a 40 nm bulk-CMOS technology, the core circuit occupies a chip area of 0.007 mm2 only.
Autors: Shih-Hao Huang;Wei-Zen Chen;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 747 - 756
Publisher: IEEE
 
» A 28-Gb/s Receiver With Self-contained Adaptive Equalization and Sampling Point Control Using Stochastic Sigma-Tracking Eye-Opening Monitor
Abstract:
This paper describes a 28-Gb/s receiver IC with self-contained adaptive equalization and sampling point control using an on-chip stochastic sigma-tracking eye-opening monitor (SSEOM). The proposed SSEOM accurately detects the bit-error-rate (BER)-related eye contour efficiently without the use of an external microcontroller. The SSEOM determines the BER-optimal sampling point and equalizer coefficients on the basis of pattern-filtered eye diagrams. It also features a background adaptation scheme for robust long-term operation by tracking temperature variations and device aging. The proposed SSEOM is integrated in a 28-Gb/s receiver that is designed to compensate for channel loss up to 25 dB at the Nyquist rate by using a continuous time linear equalizer (CTLE) and a one-tap decision feedback equalizer (DFE) together with an one-tap pre-emphasis at a transmitter. The time required for complete adaptation and the total power consumption are 364 ms and 43.9 mW, respectively. The proposed 28-Gb/s receiver is fabricated in 40 nm CMOS.
Autors: Hyosup Won;Joon-Yeong Lee;Taehun Yoon;Kwangseok Han;Sangeun Lee;Jinho Park;Hyeon-Min Bae;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Mar 2017, volume: 64, issue:3, pages: 664 - 674
Publisher: IEEE
 
» A 3-D Wideband Model Based on Dynamic Evolution of Scatterers for HAP-MIMO Channel
Abstract:
A theoretical 3-D wideband model based on the dynamic evolution of scatterers for high altitude platform multiple-input multiple-output channel is proposed. In this letter, we consider the dynamic properties of scatterers that scatterers could re-appear after they have vanished, and an -step, two-state Markov process is used to model the dynamic evolution of scatterers. The Chapman–Kolmogorov equations are used to derive the survival probabilities of scatterers and the complexity is reduced by using eigenvalue decomposition. The space-time-frequency correlation function is derived, and numerical results show that an -step Markov process is indispensable to investigate the dynamic properties of scatterers.
Autors: Zhuxian Lian;Lingge Jiang;Chen He;
Appeared in: IEEE Communications Letters
Publication date: Mar 2017, volume: 21, issue:3, pages: 684 - 687
Publisher: IEEE
 
» A 32-Stage 15-b Digital Time-Delay Integration Linear CMOS Image Sensor With Data Prediction Switching Technique
Abstract:
This paper presents a 512-column linear CMOS image sensor (CIS) with 32-stage digital time-delay integration (TDI) operation. A signal processing architecture consists of analog-front-ends, analog-to-digital converters (ADCs), and digital accumulators (DAs) are designed with optimization of timing, area, and power efficiency. An eight-column-shared 10-b successive approximation register ADC with data prediction switching technique and 11-b DA are proposed to achieve a data depth of 15 b after 32-stage TDI. The achieved signal-to-noise ratio boost is 14.84 dB after 32-stage TDI operation. The proposed linear TDI sensor is implemented in 0.11- TSMC backside illumination CIS technology with a line time of , a pixel pitch of , and a power consumption of /column.
Autors: Chin Yin;Ting Liao;Kuan-Lin Liu;Chen-Che Kao;Chin-Fong Chiu;Chih-Cheng Hsieh;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Mar 2017, volume: 64, issue:3, pages: 1167 - 1173
Publisher: IEEE
 
» A 36-V 49% Efficient Hybrid Charge Pump in Nanometer-Scale Bulk CMOS Technology
Abstract:
This paper introduces a hybrid charge pump (HCP) architecture. The HCP enables high-voltage dc outputs in a nanometer-scale CMOS technology at improved power efficiency by optimally mixing different charge pump (CP) types that trade off voltage range and power efficiency. Conventional CP outputs in a bulk CMOS process are limited to a single-diode breakdown voltage ( V in a 65-nm technology node). To support >12 V outputs, the HCP extends the voltage tolerance of bulk CMOS substrates via two technology methods: double-diode substrate isolation and field oxide isolation. To enable these isolation methods, two specialized CP cells are devised: an all-nMOS voltage doubler and an improved-drive Dickson-type pump. Two HCP design examples with opposite voltage polarities are implemented in a 65-nm CMOS technology, and their measurement results are discussed. The positive voltage HCP achieves a 36 V output and 49% peak efficiency at a 20- load current and occupies 0.18 mm in area. This output voltage represents a increase in the technology’s voltage range compared to ranges attainable by conventional designs.
Autors: Yousr Ismail;Haechang Lee;Sudhakar Pamarti;Chih-Kong Ken Yang;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 781 - 798
Publisher: IEEE
 
» A 370-pJ/b Multichannel BFSK/QPSK Transmitter Using Injection-Locked Fractional-N Synthesizer for Wireless Biotelemetry Devices
Abstract:
This paper presents a 401–428-MHz BFSK/QPSK transmitter (TX) with two types of fractional-injection-locking techniques for multichannel transmission capabilities. A -based injection-locked ring oscillator is proposed to achieve fine frequency tuning with a frequency resolution of 1.3 kHz. The proposed method facilitates multichannel BFSK modulation. For high data rate wideband QPSK modulation, frequency tuning is achieved through sequential injection locking. The TX performs 550 Kb/s for BFSK and 11 Mb/s for band-shaped QPSK with EVM of 4.4% and 4.9%, respectively. It also achieves a settling time of less than . This helps to save operating power of the wireless medical devices with duty-cycling protocol employed in the TX. Fabricated in 130-nm process technology, the TX achieves an energy efficiency of 370 pJ/b while delivering −13 dBm of output power with 1-V supply.
Autors: Kok-Hin Teng;Chun-Huat Heng;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 867 - 880
Publisher: IEEE
 
» A 3D Assembled Silicon-Embedded Transformer for 10-MHz, Ultra-High-Isolation, Compact Chip-to-Chip Power Transfer
Abstract:
In this letter, a 3D assembled silicon-embedded transformer (3DASET) is proposed and demonstrated for low-frequency, ultra-high-isolation, compact power transfer applications. The primary and secondary coils of the 3DASET are embedded inside the primary side and secondary side chips, respectively, from the backside to achieve a large coil thickness and a whole-area utilization for each coil, as well as simple fabrication and compact integration. The two chips are then back-to-back bonded, and ultra-high isolation can be achieved with a sufficiently strong and thick isolation layer between the chips. The 2-mm2 3DASET fabricated can work at a low frequency of 10 MHz with a reasonable efficiency of 70%, which is essential for reducing the switching and rectifying losses of the system. A high isolation capability of over 4.5 kV can also be achieved.
Autors: Rongxiang Wu;Niteng Liao;Xiangming Fang;Jian Cai;Qian Wang;Johnny K. O. Sin;
Appeared in: IEEE Electron Device Letters
Publication date: Mar 2017, volume: 38, issue:3, pages: 356 - 358
Publisher: IEEE
 
» A 3D Localization Approach for Subsea Pipelines Using a Spherical Detector
Abstract:
A 3D localization approach for subsea pipelines is proposed using an internal mobile spherical detector without any external auxiliary location measurements. The process of solving for the pipeline orientation using the magnetic field and acceleration measured simultaneously by the spherical detector is formulated in the rotating sensor frame. Specifically, when the frames of the accelerometer and magnetometer are identical, the measured acceleration can be used to construct the rotation matrix to map the rotating sensor frame to the stationary pipe frame. This transformation by the rotation matrix can be applied to the measured rotating magnetic field to solve the orientation equations. The rolling frequency of the detector is used to calculate the spherical detector’s velocity and mileage within the pipeline. The approach and the system have been successfully applied in a 30-km long oil pipeline. After calibration by aligning the calculated and actual pipeline ends through 3D rotation, an absolute localization error of 1.2 km is achieved. This result is promising as an initial model for future use with external measurements.
Autors: Xinjing Huang;Shili Chen;Shixu Guo;Tianshu Xu;Qianli Ma;Shijiu Jin;Gregory S. Chirikjian;
Appeared in: IEEE Sensors Journal
Publication date: Mar 2017, volume: 17, issue:6, pages: 1828 - 1836
Publisher: IEEE
 
» A 4-Element 60-GHz CMOS Phased-Array Receiver With Beamforming Calibration
Abstract:
A 4-element 60-GHz phased-array receiver RF front-end (RFE) employing LO-path phase-shifting configuration is presented. A wide bandwidth from 57 to 66 GHz is achieved by using multiple design techniques, including wide-band input matching network using on-chip baluns, peak-frequency staggering in the LNAs, and resonant-frequency tuning of the load in the first down-conversion stages. Furthermore, beamforming calibration is implemented by sequentially performing gain equalization, I/Q calibration and successive-approximation phase tuning. Implemented in a 65-nm CMOS process, each element measures gain of 21 dB and NF of 7.2 dB and IP1dB of −21 dBm in high-gain mode while achieves IP1dB of −12.5 dBm with gain of −2 dB and NF of 20 dB in low-gain mode. With beamforming calibration, the peak-to-null ratio of the synthesized 4-element array pattern is improved from 16.5 dB to 28.5 dB, corresponding to phase error of ±0.6° and amplitude mismatch of ±1.1 dB. The whole system consumes 320 mW from a 1.2-V supply and occupies a core area of mm2 excluding pads.
Autors: Liang Wu;Hiu Fai Leung;Alvin Li;Howard C. Luong;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Mar 2017, volume: 64, issue:3, pages: 642 - 652
Publisher: IEEE
 
» A 5.6 ppm/°C Temperature Coefficient, 87-dB PSRR, Sub-1-V Voltage Reference in 65-nm CMOS Exploiting the Zero-Temperature-Coefficient Point
Abstract:
This paper describes an MOSFET-only voltage reference realized in 65-nm CMOS featuring a temperature coefficient (TC) of 5.6 ppm/°C from -40 °C to 125 °C, a power supply rejection ratio of 87 dB from dc up to 800 kHz (and 75 dB at 1 MHz), a minimum supply voltage of 0.8 V, and a power dissipation of 13 . These attributes are achieved by exploiting the zero-TC point of an MOSFET and combining it with a novel curvature-compensation technique, an active attenuator, and an impedance-adapting frequency compensation scheme.
Autors: Jize Jiang;Wei Shu;Joseph S. Chang;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 623 - 633
Publisher: IEEE
 
» A 58.6 mW 30 Frames/s Real-Time Programmable Multiobject Detection Accelerator With Deformable Parts Models on Full HD $1920times 1080$ Videos
Abstract:
This paper presents a programmable, energy-efficient, and real-time object detection hardware accelerator for low power and high throughput applications using deformable parts models, with higher detection accuracy than traditional rigid body models. Three methods are used to address the high computational complexity of eight deformable parts detection: classification pruning for fewer part classification, vector quantization for memory size reduction, and feature basis projection for reduction in the cost of each classification. The chip was fabricated in a 65 nm CMOS technology, and can process full high definition videos at 60 frames/s without any OFF-chip storage. The chip has two programmable classification engines (CEs) for multiobject detection. At 30 frames/s, the chip consumes only 58.6 mW (0.94 nJ/pixel, 1168 GOPS/W). At a higher throughput of 60 frames/s, the CEs can be time multiplexed to detect even more than two object classes. This proposed accelerator enables object detection to be as energy-efficient as video compression, which is found in most cameras today.
Autors: Amr Suleiman;Zhengdong Zhang;Vivienne Sze;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 844 - 855
Publisher: IEEE
 
» A 60-GHz 4-Gb/s Fully Integrated NRZ-to-QPSK Fiber-Wireless Modulator
Abstract:
A fully integrated optical-to-wireless modulator for low-cost fiber-optical backhaul links is presented in this paper. In the receiver, a CMOS photodetector with a bandwidth of 0.5 GHz is integrated to perform optical-to-electrical conversion. A gain-boosted inverter based transimpedance amplifier achieves a high gain-bandwidth product without using inductive peaking. The two-stage equalizer compensates the photodetector bandwidth and extends the operation data rate to 4 Gb/s. The wireless modulator directly up-converts and modulates the baseband I/Q NRZ data to a QPSK signal centered at 60 GHz. Realized in 65-nm CMOS, the optical front-end achieves -3-dBm optical input sensitivity at 4 Gb/s with BER. The modulator produces -7.2-dBm output power with -12-dB EVM at a bit efficiency of 19.6 pJ/b. This design demonstrates that a small form factor and low cost optical-to-millimeter-wave modulator can be realized to support future fiber-wireless networks.
Autors: Yipeng Wang;Duona Luo;Quan Pan;Liwen Jing;Zhixin Li;C. Patrick Yue;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Mar 2017, volume: 64, issue:3, pages: 653 - 663
Publisher: IEEE
 
» A 60-GHz CMOS Frequency Tripler With Broadband Performance
Abstract:
A 60-GHz differential frequency tripler with broadband performance was implemented in 90-nm CMOS technology. A -boosted topology and notch filter were used in a fully differential cascode configuration to improve the performance of broadband and harmonic suppression. The proposed frequency tripler exhibits a measured 3-dB bandwidth ranging from 51.3 to 70.2 GHz, with a minimum conversion loss of 5.24 dB at 60 GHz. Compared with the third-harmonic frequency, the fundamental frequency and second-harmonic frequency are suppressed by more than 29.2 and 33.7 dBc, respectively.
Autors: Min-Li Chou;Hsien-Chin Chiu;Hsuan-Ling Kao;Fan-Hsiu Huang;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Mar 2017, volume: 27, issue:3, pages: 281 - 283
Publisher: IEEE
 
» A 650-GHz Backward Wave Oscillator Based on Axial Loaded Double Defected-Photonic Crystal SWS
Abstract:
Axial loaded Double Defected Photonic Crystal (ADD-PC) with a cylindrical beam channel is introduced as a slow-wave structure (SWS) for backward wave oscillator (BWO) source design. The structural and the geometrical dimensions of the proposed SWS for submillimeter wave regime are realizable using the modern microfabrication processes. Starting from the basic design; the dispersion diagram, the modal phase velocity, and the beam interaction impedance are calculated. The effect of fabrication tolerance on both the operating frequency and the beam interaction impedance is also discussed. Using a custom built numerical electron beam–wave interaction algorithm, the electromagnetic field generation supported by the ADD-PC SWS is analyzed thoroughly. Simulation results indicate that with the proposed BWO, an output power of almost 8 W at 650 GHz with 1.8% conversion efficiency can be achieved.
Autors: Ahmed I Nashed;Sujeet K. Chaudhuri;Safieddin Safavi-Naeini;
Appeared in: IEEE Transactions on Plasma Science
Publication date: Mar 2017, volume: 45, issue:3, pages: 372 - 380
Publisher: IEEE
 
» A 70-GHz LO Phase-Shifting Bidirectional Frontend Using Linear Coupled Oscillators
Abstract:
A 70-GHz two-element bidirectional frontend is demonstrated with linear coupled oscillators in a 90-nm silicon–germanium BiCMOS process. The transmitter has a measured peak output power of 7.2 dBm and a peak conversion gain of 14.5 dB while consuming 47 mA from a 1.8-V supply. The receiver has a peak conversion gain of 9.9 dB and a minimum noise figure of 8.6 dB with a nominal current consumption of 18 mA from a 1.5-V supply. The frontend is integrated with a two-element linear coupled oscillator array and achieves a maximum phase scanning of ±80°.
Autors: Tissana Kijsanayotin;Jun Li;James F. Buckwalter;
Appeared in: IEEE Transactions on Microwave Theory and Techniques
Publication date: Mar 2017, volume: 65, issue:3, pages: 892 - 904
Publisher: IEEE
 
» A 75-MHz Continuous-Time Sigma–Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage
Abstract:
A wide-bandwidth (BW) power-efficient continuous-time modulator (CT) is presented. The modulator introduces a third-order filter implemented with a lossless integrator and a multiple-feedback single-amplifier biquadratic filter with embedded loop stability compensation. An active summing block is implemented by employing a common-gate current buffer followed by a transimpedance amplifier. This combination relaxes the specification requirements of the operational amplifier by making its required BW independent of the closed-loop gain. The proposed technique achieves optimum BW with reduced power consumption, making it functional for over gigahertz operation. Fabricated in a standard 40-nm CMOS technology, and clocked at 3.2 GHz, the CT achieves a signal-to-noise-and-distortion ratio of 65.5 dB over 75-MHz BWwhile consuming 22.8 mW of power. The obtained Walden’s figure of merits is 98 fJ/conv-step.
Autors: Carlos Briseno-Vidrios;Alexander Edward;Ayman Shafik;Samuel Palermo;Jose Silva-Martinez;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 657 - 668
Publisher: IEEE
 
» A 92-dB DR, 24.3-mW, 1.25-MHz BW Sigma–Delta Modulator Using Dynamically Biased Op Amp Sharing
Abstract:
A 2–2 cascaded switched-capacitor modulator is presented for design of low-voltage, low-power, broadband analog-to-digital conversion. To reduce power dissipation in both analog and digital circuits and ensure low-voltage operation, a half-sample delayed-input feedforward architecture is employed in combination with 4-bit quantization, which results in reduced integrator output swings and relaxed timing constraint in the feedback path. The integrator power is further reduced by sharing an op amp in the two integrators in each stage and periodically changing the op amp bias condition between a high-current and a low-current mode using a fast low-power high-precision charge pump circuit. Implemented in a 0.18- CMOS technology, the experimental prototype achieves a 92-dB dynamic range, a 91-dB peak signal-to-noise ratio, and an 84-dB peak signal-to-noise plus distortion ratio, respectively for a signal bandwidth of 1.25 MHz. Operated at a 40-MHz sampling rate, the modulator dissipates 24.3 mW from a 1 V supply.
Autors: Je-Kwang Cho;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Mar 2017, volume: 25, issue:3, pages: 881 - 893
Publisher: IEEE
 
» A Bit-Plane Decomposition Matrix-Based VLSI Integer Transform Architecture for HEVC
Abstract:
In this brief, a new very-large-scale integrated (VLSI) integer transform architecture is proposed for the High Efficiency Video Coding (HEVC) encoder. The architecture is designed based on the signed bit-plane transform (SBT) matrices, which are derived from the bit-plane decompositions of the integer transform matrices in HEVC. Mathematically, an integer transform matrix can be equally expressed by the binary weighted sum of several SBT matrices that are only composed of binary 0 or ±1. The SBT matrices are very simple and have lower bit width than the original integer transform in the form. The SBT matrices are also sparse and there are many zero elements. The sparse characteristic of SBT matrices is very helpful for saving the addition operators of SBT. In the proposed architecture, instead of the original integer transform in high bit width, the video data can be respectively transformed with the SBT matrices in lower bit width. As a result, the delay of the transform unit circuit can be significantly reduced with the proposed SBT. Moreover, exploiting the redundant element characteristic of SBT matrices, in which the elements are 0 or ±1, the adder reuse strategy is proposed for our transform architecture, which can save the circuit area efficiently. The simulation results show that by employing the proposed strategies the VLSI transform architecture can be synthesized in a proper area with a high working frequency and low latency. The architecture can support all HEVC encoders coding ultra high-definition video sequences in real time.
Autors: Honggang Qi;Qingming Huang;Wen Gao;
Appeared in: IEEE Transactions on Circuits and Systems II: Express Briefs
Publication date: Mar 2017, volume: 64, issue:3, pages: 349 - 353
Publisher: IEEE
 
» A BNBF User Selection Scheme for NOMA-Based Cooperative Relaying Systems With SWIPT
Abstract:
In this letter, we investigate the outage performance of cooperative relaying transmissions in two-user non-orthogonal multiple access systems, wherein simultaneous wireless information and power transfer is employed at the near users to power their relaying operations. To this end, a best-near best-far (BNBF) user selection scheme is proposed. Considering three relaying protocols, i.e., decode-and-forward (DF), amplify-and-forward (AF), and hybrid DF/AF protocols, tight closed-form approximate expressions for the outage probability are derived to evaluate the system performance. Numerical results reveal that, for any relaying protocols used, the diversity order achieved by the BNBF scheme is , where is the number of far users, and does not depend on the number of near users.
Autors: Nhu Tri Do;Daniel Benevides Da Costa;Trung Q. Duong;Beongku An;
Appeared in: IEEE Communications Letters
Publication date: Mar 2017, volume: 21, issue:3, pages: 664 - 667
Publisher: IEEE
 
» A Broadband and High-Gain Planar Complementary Yagi Array Antenna With Circular Polarization
Abstract:
A novel planar end-fire circularly polarized (CP) complementary Yagi array antenna is proposed. The antenna has a compact and complementary structure, and exhibits excellent properties (low profile, single feed, broadband, high gain, and CP radiation). It is based on a compact combination of a pair of complementary Yagi arrays with a common driven element. In the complementary structure, the vertical polarization is contributed by a microstrip patch Yagi array, while the horizontal polarization is yielded by a strip dipole Yagi array. With the combination of the two orthogonally polarized Yagi arrays, a CP antenna with high gain and wide bandwidth is obtained. With a profile of (3 mm), the antenna has a gain of about 8 dBic, an impedance bandwidth ( dB) of 13.09% (4.57–5.21 GHz) and a 3-dB axial-ratio bandwidth of 10.51% (4.69–5.21 GHz).
Autors: Wenlong Zhou;Juhua Liu;Yunliang Long;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Mar 2017, volume: 65, issue:3, pages: 1446 - 1451
Publisher: IEEE
 
» A Carrier-Based PWM Scheme for Neutral Point Voltage Balancing in Three-Level Inverter Extending to Full Power Factor Range
Abstract:
This paper proposes a unique carrier-based pulse width modulation strategy for a three-level neutral-point-clamped inverter that works satisfactorily and with uniform convergence time over the full power factor (PF) range of the load variation. It has excellent control over capacitor voltages and mitigates low-frequency oscillations in the neutral point for the full PF range. First, an investigation is made to see how the load currents get modulated to generate compensating neutral current causing charging and discharging of dc-link capacitors. It is observed that when an additional modulating voltage signal that is in phase with the corresponding phase current is added in each phase, a neutral current is produced in the right direction which can be used to compensate for any prior unbalance in capacitor voltages. It is demonstrated that the performance of this scheme is insensitive to the load PF variation (full range from zero to unity). It performs satisfactorily throughout the entire linear modulation range and eliminates any undesirable low-frequency harmonic component in the compensating neutral current. The effectiveness of the proposed scheme is verified through simulation and experimental results by varying load PF as well as modulation index with both passive and motor loads.
Autors: Santu Kr. Giri;Sibaprasad Chakrabarti;Subrata Banerjee;Chandan Chakraborty;
Appeared in: IEEE Transactions on Industrial Electronics
Publication date: Mar 2017, volume: 64, issue:3, pages: 1873 - 1883
Publisher: IEEE
 
» A CCA and ICA-Based Mixture Model for Identifying Major Depression Disorder
Abstract:
The fMRI signals are usually filtered before processing and analyzing. This process can result in the loss of information carried by the higher frequency in the low frequency fluctuation. ICA and CCA are two classical methods in fMRI. ICA finds the statistically independent components of the observed data, however these components are usually physiologically uninterpretable without auxiliary procedures. CCA decomposes two sets of data into component pairs in some order, however these components may be mixtures of real signals and noise. In order to obtain statistically independent components and avoid the loss of information in the process of filtering, we propose a mixed model based on ICA and CCA, which does not need to filter the data. It is shown by the experiments that the new model has some advantages compared with the classical ICA and CCA. The components obtained by the new model is statistically independent. The useful information included in the low frequency fluctuation can be preserved. Experiments on synthetic data show satisfying results. As an application, this new model is used to design an algorithm to discriminate the major depressions from normal controls, with encouraging experimental results.
Autors: Wuhong Lin;Huawang Wu;Yishu Liu;Dongsheng Lv;Lihua Yang;
Appeared in: IEEE Transactions on Medical Imaging
Publication date: Mar 2017, volume: 36, issue:3, pages: 745 - 756
Publisher: IEEE
 
» A Chalcogenide Multimode Interferometric Temperature Sensor Operating at a Wavelength of $2~mutext{m}$
Abstract:
This paper investigated the fabrication of a singlemode-multimode-singlemode fiber structure based on a chalcogenide (As2S3 and AsxS1-x) multimode fiber sandwiched between two standard silica singlemode fibers using a commercial fiber fusion splicer. The temperature dependence of this hybrid fiber structure was investigated and a first proof of concept showed that the hybrid SMS fiber structure has an average experimental temperature sensitivity of circa 84.38 pm/°C over a temperature range of 20 °C~100°C at the wavelength range around . The measured results show a general agreement with numerical simulations based on a guided-mode propagation analysis method. Our result provides a potential platform for the development of compact, high-optical-quality, and robust sensing devices operating at the midinfrared wavelength range.
Autors: Lin She;Pengfei Wang;Weimin Sun;Xianfan Wang;Wenlei Yang;Gilberto Brambilla;Gerald Farrell;
Appeared in: IEEE Sensors Journal
Publication date: Mar 2017, volume: 17, issue:6, pages: 1721 - 1726
Publisher: IEEE
 
» A Cloud Computing Solution for the Efficient Implementation of the P-SBAS DInSAR Approach
Abstract:
We present an efficient Cloud Computing (CC) implementation of the Parallel Small BAseline Subset (P-SBAS) algorithm, which is an advanced Differential Interferometric Synthetic Aperture Radar (DInSAR) technique for the generation of Earth surface displacement time series through distributed computing infrastructures. The rationale of our approach consists in properly distributing the large data volumes and the processing tasks involved in the P-SBAS chain among the available (virtual and/or physical) computing nodes of the CC infrastructure, so that each one of these elements can concurrently work on data that are physically stored on its own local volume. To do this, both an ad hoc management of the data flow and an appropriate scheduling of the parallel jobs have been also implemented to properly handle the high complexity of the P-SBAS workflow. The proposed solution allows minimizing the overall data transfer and network load, thus improving the P-SBAS efficiency and scalability within the exploited CC environments. The presented P-SBAS implementation has been extensively validated through two experimental analyses, which have been carried out by exploiting the Amazon Web Services (AWS) Elastic Cloud Compute (EC2) resources. The former analysis involves the processing of a large (128 SAR images) COSMO-SkyMed dataset, which has been performed by exploiting up to 64 computing nodes, and is aimed at demonstrating the P-SBAS scalable performances. The latter allows us to show the P-SBAS capability to generate DInSAR results at a regional scale (150 000 km2 in Southern California) in a very short time (about 9 h), by simultaneously processing 18 ENVISAT frames that correspond to a total of 741 SAR images, exploiting in parallel 144 AWS computing nodes. The presented results confirm the effectiveness of the proposed P-SBAS CC solution, which may contribute to further extend the frontiers of the DInSAR investigation at a very large scale.
Autors: Ivana Zinno;Francesco Casu;Claudio De Luca;Stefano Elefante;Riccardo Lanari;Michele Manunta;
Appeared in: IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing
Publication date: Mar 2017, volume: 10, issue:3, pages: 802 - 817
Publisher: IEEE
 
» A Cloud Reservation System for Big Data Applications
Abstract:
Emerging Big Data applications increasingly require resources beyond those available from a single server and may be expressed as a complex workflow of many components and dependency relationships—each component potentially requiring its own specific, and perhaps specialized, resources for its execution. Efficiently supporting this type of Big Data application is a challenging resource management problem for existing cloud environments. In response, we propose a two-stage protocol for solving this resource management problem. We exploit spatial locality in the first stage by dynamically forming rack-level coalitions of servers to execute a workflow component. These coalitions only exist for the duration of the execution of their assigned component and are subsequently disbanded, allowing their resources to take part in future coalitions. The second stage creates a package of these coalitions, designed to support all the components in the complete workflow. To minimize the communication and housekeeping overhead needed to form this package of coalitions, the technique of combinatorial auctions is adapted from market-based resource allocation. This technique has a considerably lower overhead for resource aggregation than the traditional hierarchically organized models. We analyze two strategies for coalition formation: the first, history-based uses information from past auctions to pre-form coalitions in anticipation of predicted demand; the second one is a just-in-time that builds coalitions only when support for specific workflow components is requested.
Autors: Dan C. Marinescu;Ashkan Paya;John P. Morrison;
Appeared in: IEEE Transactions on Parallel and Distributed Systems
Publication date: Mar 2017, volume: 28, issue:3, pages: 606 - 618
Publisher: IEEE
 
» A CMOS Monolithic Position-Sensitive Detector With Stray Illumination Noise Removal for Light-Spot Position Detection Applications
Abstract:
In this paper, a novel CMOS monolithic position-sensitive detector (PSD) with stray illumination noise removal for light spot position detection applications is proposed. The light sensor and analog processing circuits are monolithically and compactly integrated. Compared with devices developed in previous studies, the proposed monolithic PSD not only has the basic functions of PSDs, but also achieves stray illumination noise removal. All the functions and performance of the proposed monolithic PSD were successfully tested and demonstrated through measurements. The proposed chip is suitable for devices involving light-spot position detection.
Autors: Cheng-Ta Chiang;Yu-Ting Hou;
Appeared in: IEEE Sensors Journal
Publication date: Mar 2017, volume: 17, issue:6, pages: 1918 - 1924
Publisher: IEEE
 
» A Coaxial Magnetic Gear With Consequent-Pole Rotors
Abstract:
In this paper, a novel coaxial magnetic gear (MG) is proposed, in which both permanent magnet and consequent poles are employed on the inner and outer rotors. The MG is expected with improved torque transmission capability by increasing the effective magnetic flux and offering additional reluctance torque. Air-gap field distribution and torque–angle characteristic of this MG are analyzed and compared with the conventional MG, which adopts dual surface-mounted permanent magnet rotors. To maximize the torque density, several key design parameters are investigated using finite-element method. Analysis results indicate that the proposed MG with ferrite magnets can largely improve the pull-out torque. In addition, end effect and power losses with different rotor structures are analyzed. Performance of two optimized MGs is then validated with test. Also, the MG cost effectiveness with different magnet materials is presented.
Autors: Jian-Xin Shen;Hua-Yang Li;He Hao;Meng-Jia Jin;
Appeared in: IEEE Transactions on Energy Conversion
Publication date: Mar 2017, volume: 32, issue:1, pages: 267 - 275
Publisher: IEEE
 
» A Cognitive Control Method for Cost-Efficient CBTC Systems With Smart Grids
Abstract:
Communication-based train control (CBTC) systems use wireless local area networks for information transmission between trains and wayside equipment. Since inevitable packet delay and drop are introduced in train–wayside communications, information uncertainties in trains' states will lead to unplanned traction/braking demands, as well as waste in electrical energy. Moreover, with the introduction of regenerative braking technology, power grids in CBTC systems are evolving to smart grids, and cost-aware power management should be employed to reduce the total financial cost of consumed electrical energy. In this paper, a cognitive control method for CBTC systems with smart grids is presented to enhance both train operation performance and cost efficiency. We formulate a cognitive control system model for CBTC systems. The information gap in cognitive control is calculated to analyze how the train–wayside communications affect the operation of trains. The Q-learning algorithm is used in the proposed cognitive control method, and a joint objective function composed of the information gap and the total financial cost is applied to generate optimal policy. The medium-access control layer retry-limit adaption and traction strategy selection are adopted as cognitive actions. Extensive simulation results show that the cost efficiency and train operation performance of CBTC systems are substantially improved using our proposed cognitive control method.
Autors: Wenzhe Sun;Fei Richard Yu;Tao Tang;Siqing You;
Appeared in: IEEE Transactions on Intelligent Transportation Systems
Publication date: Mar 2017, volume: 18, issue:3, pages: 568 - 582
Publisher: IEEE
 
» A Collision-Mitigation Cuckoo Hashing Scheme for Large-Scale Storage Systems
Abstract:
With the rapid growth of the amount of information, cloud computing servers need to process and analyze large amounts of high-dimensional and unstructured data timely and accurately. This usually requires many query operations. Due to simplicity and ease of use, cuckoo hashing schemes have been widely used in real-world cloud-related applications. However, due to the potential hash collisions, the cuckoo hashing suffers from endless loops and high insertion latency, even high risks of re-construction of entire hash table. In order to address these problems, we propose a cost-efficient cuckoo hashing scheme, called MinCounter. The idea behind MinCounter is to alleviate the occurrence of endless loops in the data insertion by selecting unbusy kicking-out routes. MinCounter selects the “cold” (infrequently accessed), rather than random, buckets to handle hash collisions. We further improve the concurrency of the MinCounter scheme to pursue higher performance and adapt to concurrent applications. MinCounter has the salient features of offering efficient insertion and query services and delivering high performance of cloud servers, as well as enhancing the experiences for cloud users. We have implemented MinCounter in a large-scale cloud testbed and examined the performance by using three real-world traces. Extensive experimental results demonstrate the efficacy and efficiency of MinCounter.
Autors: Yuanyuan Sun;Yu Hua;Dan Feng;Ling Yang;Pengfei Zuo;Shunde Cao;Yuncheng Guo;
Appeared in: IEEE Transactions on Parallel and Distributed Systems
Publication date: Mar 2017, volume: 28, issue:3, pages: 619 - 632
Publisher: IEEE
 
» A Community-Driven Access Control Approach in Distributed IoT Environments
Abstract:
The distributed Internet of Things is emerging in the literature as a new paradigm for IoT where remotely controlled smart objects can act on their own to sense/actuate, store, and interpret information either created by them or within the surrounding environment. This paradigm calls for novel security and access control mechanisms to enable smart objects with various resource limitations to evaluate a claimed access right from external entities without relying on central authorization systems. This article proposes utilizing a community-based structure to define the notion of access rights in a distributed IoT environment. With this structure, within a given community of smart objects sharing a common mission, access rights are to be evaluated based on the community norms by smart objects with sufficient resources on behalf of those with resource limitations. A novel, community-driven, access control framework is proposed in addition to a prototype to demonstrate access control granting in a user-friendly manner.
Autors: Dina Hussein;Emmanuel Bertin;Vincent Frey;
Appeared in: IEEE Communications Magazine
Publication date: Mar 2017, volume: 55, issue:3, pages: 146 - 153
Publisher: IEEE
 
» A Compact Four-Way Power Combiner
Abstract:
A compact 8-port waveguide network is proposed in this letter. It is constructed by cascading two compact coaxial magic-Ts and one coplanar coaxial waveguide magic-T in series. Based on the 8-port waveguide network, a four-way power combiner is realized with three matching ports connected to loads. Measurements show that from 7.8 to 10.3 GHz, the return loss is greater than 18 dB, the isolation is greater than 21 dB, the insertion loss is less than 0.4 dB, and the amplitude and phase imbalance are less than 0.3 dB and 3°, respectively. Its cross section areas are approximately for the central frequency of 9 GHz. The measurements agree well with the simulations.
Autors: Letian Guo;Jiawei Li;Wenhua Huang;Hao Shao;Tao Ba;
Appeared in: IEEE Microwave and Wireless Components Letters
Publication date: Mar 2017, volume: 27, issue:3, pages: 239 - 241
Publisher: IEEE
 
» A Compact Ground-Based Interferometric Radar for Landslide Monitoring: The Xerém Experiment
Abstract:
A real-time monitoring system based on ground-based synthetic aperture radar interferometry (GB-InSAR) were developed and deployed with the objective to gain understanding of landslide dynamics in an area in Xerém (district of Duque de Caxias - RJ, Brazil). The area is subjected to landslide risk and the deployed system aims to provide subsidies to the authorities to prepare actions related to prevention and evacuation, and serve as the basis for a future early-warning system in the framework of the Civil Defense of Duque de Caxias. The system consists of a compact and rugged X-band GB-InSAR newly developed by Bradar, Brazil. The processing and monitoring methodology are proposed. Two campaigns, totaling six days, were carried out. The acquisitions of the first campaign occurred without rain. In the second campaign, rain events, varying from light to torrential rainfall, occurred for a period of time, in subsequent days, during the radar acquisitions. New insights on landslide dynamics are revealed. The monitoring data show that, approximately 10 h after heavy rainfall, the terrain movement on a slope reached 4 mm/h during ca. 5 to 8 h, resulting in velocities of 20 to 32 mm/day.
Autors: Karlus Alexander Câmara de Macedo;Fernanda Ledo G. Ramos;Clóvis Gaboardi;João Roberto Moreira;Fernanda Vissirini;Marcello Silva da Costa;
Appeared in: IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing
Publication date: Mar 2017, volume: 10, issue:3, pages: 975 - 986
Publisher: IEEE
 
» A Compact, Capacitively Fed UWB Antenna With Monopole-Like Radiation Characteristics
Abstract:
A compact, ultrawideband (UWB) antenna occupying a cylindrical volume and providing omnidirectional monopole-like radiation is introduced. The antenna consists of two closely placed 3-D loops, two parasitic small loops, and a circular top hat. Two strip-shaped probes, each coupling with one loop, are used to feed the antenna in common mode. UWB operation is achieved by taking advantage of the magnetic coupling of the parallel-fed 3-D loops. Small electrical dimensions of the antenna are due to the special capacitive proximity feeding scheme and the presence of the top hat. A prototype with 4.1:1 bandwidth is designed, fabricated, and characterized. The antenna demonstrates a VSWR better than 2:1 and monopole-like omnidirectional radiation characteristics across this entire band. It occupies a cylindrical volume with a diameter of and a height of , where is the free-space wavelength at the lowest frequency of operation. The antenna has a , where is the wavenumber at its lowest frequency of operation. The fabricated prototype is demonstrated to have a lowest frequency of operation that is only 10% above the theoretical limits on UWB antennas. Further miniaturization of the antenna using a spherical top hat is also examined and demonstrated to be capable of reducing values down to 0.60.
Autors: Mingjian Li;Nader Behdad;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Mar 2017, volume: 65, issue:3, pages: 1026 - 1037
Publisher: IEEE
 
» A Comparative Study of Metal–Semiconductor–Metal Ultraviolet Photodetectors Based on Ultrasonic Spray Pyrolysis Deposited Anatase and Rutile TiO2
Abstract:
Anatase and rutile TiO2-based metal–semiconductor–metal (MSM) ultraviolet photodetectors (PDs) are fabricated and investigated. The TiO2 thin films are grown by the ultrasonic spray pyrolysis deposition and the TiO2 films are annealed at 400 °C and 800 °C to form the anatase and the rutile phases. The material characteristics were measured by X-ray diffraction, Raman spectrum, X-ray photoelectron spectroscopy, and photoluminescence. The optical characteristics such as refractive index, extinction coefficient, absorption coefficient, and optical reflectance were characterized. The electrical and optoelectronic characteristics of the anatase and rutile TiO2 MSM PDs were characterized, including current-voltage, Schottky barrier height, spectral responsivity, response time, and detectivity.
Autors: Han-Yin Liu;Guan-Jyun Liu;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Mar 2017, volume: 64, issue:3, pages: 1108 - 1113
Publisher: IEEE
 
» A Comparison of Three Uniquely Different State of the Art and Two Classical Multiobjective Optimization Algorithms as Applied to Electromagnetics
Abstract:
This paper compares three modern and two classical multiobjective optimizers (MOOs) as applied to real-world problems in electromagnetics. The behavior of sophisticated optimizers on simple test functions has been studied exhaustively. In contrast, the algorithms here are tested on practical applications, where the function evaluations are computationally expensive, making the convergence rate a crucial factor. The examples considered include the optimization of a narrowband slot antenna, a mushroom-type electromagnetic bandgap structure, and an ultrawideband Vivaldi antenna. Another popular topic in the literature is in comparing classical MOOs on electromagnetics problems. The modern optimizers chosen in this paper are state of the art and each has a distinct design philosophy. This paper introduces two unique MOOs to the electromagnetics community: BORG, an auto-adaptive genetic algorithm and the Multi-Objective Covariance Matrix Adaptation Evolutionary Strategy (MO-CMA-ES), an extension of the popular single-objective CMA-ES. These algorithms are compared to the Multi-objective Evolutionary Algorithm based on Decomposition (MOEA/D), a Chebysheff scalarization algorithm, and two classical MOOs. This paper will study the behavior of these algorithms on problems in electromagnetics with a limited number of function evaluations using five distinct metrics and will provide useful guidelines and recommended optimizer settings.
Autors: Jogender Nagar;Douglas H. Werner;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Mar 2017, volume: 65, issue:3, pages: 1267 - 1280
Publisher: IEEE
 
» A Comprehensive Characterization Method for Lateral Profiling of Interface Traps and Trapped Charges in P-SONOS Cell Devices
Abstract:
A comprehensive characterization method has been developed in this paper for reliable lateral profiling of the interface traps (), localized charges (), and trapped holes () in P-SONOS cell devices. Charge pumping current () measurement can be used to probe and from the increase of maximum and the shift of curve along the base level voltage (). When increasing the program and erase (P/E) cycles, the negative threshold voltage () shift at both program and erase states suggests the generation of . The evolution of , , and during P/E cycling can consistently explain the nonmonotonic variations of gate induced drain leakage current () and substrate current () as well as dramatic differences between the source and drain. The lateral migration of caused by extending P/E cycles may lead to the failure of two-bit operation in SONOS cell devices. The larger shift and subthreshold swing, smaller read current, and lower transconductance may degrade the endurance and retention of P-SONOS when applied in Flash memory.
Autors: Jyh-Chyurn Guo;Pei-Ying Du;
Appeared in: IEEE Transactions on Device and Materials Reliability
Publication date: Mar 2017, volume: 17, issue:1, pages: 121 - 129
Publisher: IEEE
 
» A Comprehensive Study of MapReduce Over Lustre for Intermediate Data Placement and Shuffle Strategies on HPC Clusters
Abstract:
With high performance interconnects and parallel file systems, running MapReduce over modern High Performance Computing (HPC) clusters has attracted much attention due to its uniqueness of solving data analytics problems with a combination of Big Data and HPC technologies. Since the MapReduce architecture relies heavily on the availability of local storage media, the Lustre-based global storage in HPC clusters poses many new opportunities and challenges. In this paper, we perform a comprehensive study on different MapReduce over Lustre deployments and propose a novel high-performance design of YARN MapReduce on HPC clusters by utilizing Lustre as the additional storage provider for intermediate data. With a deployment architecture where both local disks and Lustre are utilized for intermediate data storage, we propose a novel priority directory selection scheme through which RDMA-enhanced MapReduce can choose the best intermediate storage during runtime by on-line profiling. Our results indicate that, we can achieve 44 percent performance benefit for shuffle-intensive workloads in leadership-class HPC systems. Our priority directory selection scheme can improve the job execution time by 63 percent over default MapReduce while executing multiple concurrent jobs. To the best of our knowledge, this is the first such comprehensive study for YARN MapReduce with Lustre and RDMA.
Autors: Md. Wasi-ur- Rahman;Nusrat Sharmin Islam;Xiaoyi Lu;Dhabaleswar K. (DK) Panda;
Appeared in: IEEE Transactions on Parallel and Distributed Systems
Publication date: Mar 2017, volume: 28, issue:3, pages: 633 - 646
Publisher: IEEE
 
» A Comprehensive Study on the Geometrical Effects in High-Power 4H–SiC BJTs
Abstract:
Geometrical effects on the forward characteristics of high-power bipolar junction transistors are studied. An implantation-free area optimized junction termination is implemented in order to have a stable breakdown voltage. The effect of varying the emitter-base geometry, i.e., the emitter width (, the base width (, emitter contact–emitter edge distance (, and base contact–emitter edge ( on the on-state characteristics is studied in the different emitter cell geometries. The emitter size effect shows the highest influence on the current gain (. It shows a significant effect on the (single finger design, about 61%; square cell geometry, about 98%; hexagon cell geometry, about 90%). The base size effect also shows a significant improvement on the of about 23% at a given .
Autors: Arash Salemi;Hossein Elahipanah;Carl-Mikael Zetterling;Mikael Östling;
Appeared in: IEEE Transactions on Electron Devices
Publication date: Mar 2017, volume: 64, issue:3, pages: 882 - 887
Publisher: IEEE
 
» A Consensus-Based Approach for Platooning with Intervehicular Communications and Its Validation in Realistic Scenarios
Abstract:
Automated and coordinated vehicles' driving (platooning) is very challenging due to the multibody control complexity and the presence of unreliable time-varying wireless intervehicular communication (IVC). We propose a novel controller for vehicle platooning based on consensus and analytically demonstrate its stability and dynamic properties. Traditional approaches assume the logical control topology as a constraint fixed a priori, and the control law is designed consequently; our approach makes the control topology a design parameter that can be exploited to reconfigure the controller, depending on the needs and characteristics of the scenario. Furthermore, the controller automatically compensates outdated information caused by network losses and delays. The controller is implemented in Plexe, which is a state-of-the-art IVC and mobility simulator that includes basic building blocks for platooning. Analysis and simulations show the controller robustness and performance in several scenarios, including realistic propagation conditions with interference caused by other vehicles. We compare our approach against a controller taken from the literature, which is generally considered among the most performing ones. Finally, we test the proposed controller by implementing the real dynamics (engine, transmission, braking systems, etc.) of heterogeneous vehicles in Plexe and verifying that platoons remain stable and safe, regardless of real-life impairments that cannot be modeled in the analytic solution. The results show the ability of the proposed approach to maintain a stable string of realistic vehicles with different control-communication topologies, even in the presence of strong interference, delays, and fading conditions, providing higher comfort and safety for platoon drivers.
Autors: Stefania Santini;Alessandro Salvi;Antonio Saverio Valente;Antonio Pescapé;Michele Segata;Renato Lo Cigno;
Appeared in: IEEE Transactions on Vehicular Technology
Publication date: Mar 2017, volume: 66, issue:3, pages: 1985 - 1999
Publisher: IEEE
 
» A Controllable Power Distribution Strategy for Open Winding Hybrid Excitation Generator System
Abstract:
The open winding permanent magnet generator system is suitable for applications such as renewable energy power generation systems with multiple power sources, due to its high power density, relatively few power switches, and high degree of integration. However, for this system, it is difficult to quantitatively control the power distribution between different energy sources. In this paper, an open winding hybrid excitation generator system is presented, and for this system, a controllable power distribution strategy is investigated. In the proposed strategy, the excitation current is regulated according to the error in the current loop of the auxiliary energy source, which can achieve the regulation of the output power of the generator and finally realize the power quantitative control of the auxiliary energy source. Then, the topologies of the hybrid excitation machine are analyzed and chosen with emphasize on the influence of the flux regulation capability on the control capability of system power distribution. The experiments are carried out on a parallel hybrid excitation flux-switching (PHEFS) generator system, and the results verify the correctness and effectiveness of the proposed controllable power distribution strategy and the power distribution capability of the PHEFS generator.
Autors: Yu Wang;Zhiquan Deng;
Appeared in: IEEE Transactions on Energy Conversion
Publication date: Mar 2017, volume: 32, issue:1, pages: 122 - 136
Publisher: IEEE
 
» A Conversation About Signal Processing at Elementary School [From the Editor]
Abstract:
Presents the introductory editorial for this issue of the publication.
Autors: Min Wu;
Appeared in: IEEE Signal Processing Magazine
Publication date: Mar 2017, volume: 34, issue:2, pages: 3 - 4
Publisher: IEEE
 
» A Conversation with Your Future Self [From the Editor's Desk]
Abstract:
Presents the introductory editorial for this issue of the publication.
Autors: Lanny Floyd;
Appeared in: IEEE Industry Applications Magazine
Publication date: Mar 2017, volume: 23, issue:2, pages: 3 - 3
Publisher: IEEE
 
» A Convolutional Neural Network-Based Chinese Text Detection Algorithm via Text Structure Modeling
Abstract:
Text detection in a natural environment plays an important role in many computer vision applications. While existing text detection methods are focused on English characters, there are strong application demands on text detection in other languages, such as Chinese. In this paper, we present a novel text detection algorithm for Chinese characters based on a specific designed convolutional neural network (CNN). The CNN contains a text structure component detector layer, a spatial pyramid layer, and a multi-input-layer deep belief network (DBN). The CNN is pre-trained via a convolutional sparse auto-encoder, specifically designed for extracting complex features from Chinese characters. In particular, the text structure component detectors enhance the accuracy and uniqueness of feature descriptors by extracting multiple text structure components in various ways. The spatial pyramid layer enhances the scale invariability of the CNN for detecting texts in multiple scales. Finally, the multi-input-layer DBN replaces the fully connected layers in the CNN to ensure features from multiple scales are comparable. A multilingual text detection dataset, in which texts in Chinese, English, and digits are labeled separately, is set up to evaluate the proposed text detection algorithm. The proposed algorithm shows a significant performance improvement over the baseline CNN algorithms. In addition the proposed algorithm is evaluated over a public multilingual benchmark and achieves state-of-the-art result under multiple languages. Furthermore, a simplified version of the proposed algorithm with only general components is evaluated on the ICDAR 2011 and 2013 datasets, showing comparable detection performance to the existing general text detection algorithms.
Autors: Xiaohang Ren;Yi Zhou;Jianhua He;Kai Chen;Xiaokang Yang;Jun Sun;
Appeared in: IEEE Transactions on Multimedia
Publication date: Mar 2017, volume: 19, issue:3, pages: 506 - 518
Publisher: IEEE
 
» A DC-to-12.5 Gb/s 9.76 mW/Gb/s All-Rate CDR With a Single LC VCO in 90 nm CMOS
Abstract:
A dual-lane DC-to-12.5 Gb/s all-rate clock and data recovery (CDR) IC with a single LC voltage-controlled oscillator is fabricated in a 90 nm CMOS. An all-rate clock divider with an asynchronous phase calibration scheme is employed to generate all-rate clock signals without a phase mismatch or duty cycle distortion. The IC features an automatic loop gain control scheme that adjusts the bandwidth of a CDR in the background for optimal bit error rate (BER) performance by monitoring the phase difference between the incoming data and the recovered clock signal. The proposed CDR consumes 244 mW at 12.5 Gb/s under dual-lane operation with an input sensitivity of 12 mV. The CDR supports referenceless all-rate operation with a BER < 10 on PRBS31 and compensates for 20 dB of channel loss using a continuous-time linear equalizer (CTLE), a one-tap decision feedback equalizer (DFE), and a three-tap pre-emphasis filter. The power efficiency of the test chip is 9.76 mW/Gb/s.
Autors: Jong-Hyeok Yoon;Soon-Won Kwon;Hyeon-Min Bae;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 856 - 866
Publisher: IEEE
 
» A Declarative Optimization Engine for Resource Provisioning of Scientific Workflows in Geo-Distributed Clouds
Abstract:
Geo-distributed clouds are becoming increasingly popular for cloud providers, and data centers with different regions often offer different prices, even for the same type of virtual machines. Resource provisioning in geo-distributed clouds is an important and complicated problem for budget and performance optimizations of scientific workflows. Scientists are facing the complexities resulted from various cloud offerings in the geo-distributed settings, severe cloud performance dynamics and evolving user requirements on performance and cost. To address those complexities, we propose a declarative optimization engine named Geco for resource provisioning of scientific workflows in geo-distributed clouds. Geco allows users to specify their workflow optimization goals and constraints of specific problems with an extended declarative language. We propose a novel probabilistic optimization approach for evaluating the declarative optimization goals and constraints to address the cloud dynamics. Additionally, we develop runtime optimizations to more effectively utilize the cloud resources at runtime. To accelerate the solution finding, Geco leverages the power of GPUs to find the solution in a fast and timely manner. Our evaluations with four common workflow provisioning problems demonstrate that, Geco is able to achieve more effective performance/cost optimizations in geo-distributed cloud environments than the state-of-the-art approaches.
Autors: Amelie Chi Zhou;Bingsheng He;Xuntao Cheng;Chiew Tong Lau;
Appeared in: IEEE Transactions on Parallel and Distributed Systems
Publication date: Mar 2017, volume: 28, issue:3, pages: 647 - 661
Publisher: IEEE
 
» A Deep Matrix Factorization Method for Learning Attribute Representations
Abstract:
Semi-Non-negative Matrix Factorization is a technique that learns a low-dimensional representation of a dataset that lends itself to a clustering interpretation. It is possible that the mapping between this new representation and our original data matrix contains rather complex hierarchical information with implicit lower-level hidden attributes, that classical one level clustering methodologies cannot interpret. In this work we propose a novel model, Deep Semi-NMF, that is able to learn such hidden representations that allow themselves to an interpretation of clustering according to different, unknown attributes of a given dataset. We also present a semi-supervised version of the algorithm, named Deep WSF, that allows the use of (partial) prior information for each of the known attributes of a dataset, that allows the model to be used on datasets with mixed attribute knowledge. Finally, we show that our models are able to learn low-dimensional representations that are better suited for clustering, but also classification, outperforming Semi-Non-negative Matrix Factorization, but also other state-of-the-art methodologies variants.
Autors: George Trigeorgis;Konstantinos Bousmalis;Stefanos Zafeiriou;Björn W. Schuller;
Appeared in: IEEE Transactions on Pattern Analysis and Machine Intelligence
Publication date: Mar 2017, volume: 39, issue:3, pages: 417 - 429
Publisher: IEEE
 
» A Depth From Defocus Measurement System Using a Liquid Lens Objective for Extended Depth Range
Abstract:
A novel depth from defocus (DFD) measurement system is presented, where the extension of the measurement range is performed using an emergent technology based on liquid lenses. A suitable set of different focal lengths, obtained by properly changing the liquid lens supply voltage, provides multiple camera settings without duplicating the system elements or using moving parts. A simple and compact setup, with a single camera/illuminator coaxial assembly, is obtained. The measurement is based on an active DFD technique using modulation measurement profilometry for the estimation of the contrast at each image point as a function of the depth range. Two different measurement methods are proposed, both based on a combination of multiple contrast curves, each derived at a specific focal length. In the first method (intensity contrast method), the depth information is recovered directly from the contrast curves, whereas in the second (differential contrast method), the depth is measured using contrast curve pairs. We obtained a measurement of 0.55 mm over a depth range of 60 mm with the intensity contrast method (0.92% of the total range) and an of 0.76 mm over a depth range of 135 mm with the differential contrast method (0.56% of the total range). Thus, the intensity contrast method is within the state-of-the-art DFD systems, whereas the differential contrast method allows, being almost equal, a remarkable extension of the depth range.
Autors: Simone Pasinetti;Ileana Bodini;Matteo Lancini;Franco Docchio;Giovanna Sansoni;
Appeared in: IEEE Transactions on Instrumentation and Measurement
Publication date: Mar 2017, volume: 66, issue:3, pages: 441 - 450
Publisher: IEEE
 
» A Diamond Milestone for a Winning Combination
Abstract:
Autors: George F. Hayhoe;
Appeared in: IEEE Transactions on Professional Communication
Publication date: Mar 2017, volume: 60, issue:1, pages: 2 - 3
Publisher: IEEE
 
» A Displacement Uncertainty Model for 2-D DIC Measurement Under Motion Blur Conditions
Abstract:
In this paper, the effects of motion blur on 2-D digital image correlation (DIC) measurements are discussed, with a particular focus on the description of displacement measurement uncertainty. The research started with the simulation of motion blur with a suitable literature-based algorithm. Then the state of the art of uncertainty analysis in the context of DIC was compared with simulation results, and it was found that the effects of motion blur on uncertainty are not predicted correctly by the literature models. This phenomenon is explained by the fact that the literature models do not consider motion blur. Consequently, a simple monodimensional case is analyzed. In this way, it has been possible to evaluate the sensitivity of DIC correlation function [evaluated as the sum of squared differences (SSD)] to motion blur. Using these results, it is possible to extend the analysis to the case of a generic image with the help of a power-law model. Eventually, the model proposed in this paper is able to represent the effects of motion blur correctly.
Autors: Alberto Lavatelli;Emanuele Zappa;
Appeared in: IEEE Transactions on Instrumentation and Measurement
Publication date: Mar 2017, volume: 66, issue:3, pages: 451 - 459
Publisher: IEEE
 
» A Distributed Feedback Motion Planning Protocol for Multiple Unicycle Agents of Different Classes
Abstract:
This paper presents a novel feedback method for the motion planning and coordination of multiple agents that belong to two classes, namely class-A and class-B. All agents are modeled via unicycle kinematics. Agents of class-B do not share information with agents of class-A and do not participate in ensuring safety, modeling thus agents with failed sensing/communication systems, agents of higher priority, or moving obstacles with known upper bounded velocity. The method is built upon a family of 2-D analytic vector fields, which under mild assumptions are proved to be safe feedback motion plans with a unique stable singular point. The conditions which ensure collision free and almost global convergence for a single agent and the analytical form of the vector fields are then utilized in the design the proposed distributed, semi-cooperative multi-agent coordination protocol. Semi-cooperative coordination has been defined in prior work as the ad hoc prioritization and conflict resolution among agents of the same class; more specifically, participation in conflict resolution and collision avoidance for each agent is determined on-the-fly based on whether the agent's motion results in decreasing its distance with respect to its neighbor agents; based on this condition, the agent decides to either ignore its neighbors, or adjust its velocity and avoid the neighbor agent with respect to which the rate of decrease of the pairwise inter agent distance is maximal. The proposed coordination protocol builds upon this logic and addresses the case of multiple agents of distinct classes (class-A and class-B) in conflict. Guarantees on the safety of the multi-agent system and the almost global convergence of the agents to their destinations are proved. The efficacy of the proposed methodology is demonstrated via simulation results in static and dynamic environments.
Autors: Dimitra Panagou;
Appeared in: IEEE Transactions on Automatic Control
Publication date: Mar 2017, volume: 62, issue:3, pages: 1178 - 1193
Publisher: IEEE
 
» A Distributed Scheduling Algorithm for Underwater Acoustic Networks With Large Propagation Delays
Abstract:
Underwater acoustic (UWA) networks are a key form of communications for human exploration and activities in the oceanographic space of the earth. A fundamental issue of UWA communications is large propagation delays due to water medium, which has posed a grand challenge in UWA network protocol design. Conventional wisdom of addressing this issue is to live with this disadvantage by inserting a guard interval to introduce immunity to propagation delays. Recent advances in interference alignment (IA) open up a new direction to address this issue and promise a great potential to improve network throughput by exploiting large propagation delays. In this paper, we investigate propagation delay-based IA (PD-IA) in multi-hop UWA networks. We first develop a set of simple constraints to characterize PD-IA feasible region at the physical layer. Based on the set of PD-IA constraints, we develop a distributed PD-IA scheduling algorithm to greedily maximize interference overlapping possibilities in a multi-hop UWA network. Simulation results show that the proposed PD-IA algorithm yields higher throughput than an idealized benchmark algorithm without propagation delays, indicating that large propagation delays are not adversarial but beneficial for network throughput performance.
Autors: Huacheng Zeng;Y. Thomas Hou;Yi Shi;Wenjing Lou;Sastry Kompella;Scott F. Midkiff;
Appeared in: IEEE Transactions on Communications
Publication date: Mar 2017, volume: 65, issue:3, pages: 1131 - 1145
Publisher: IEEE
 
» A Dual Method for Computing Power Transfer Distribution Factors
Abstract:
Power Transfer Distribution Factors (PTDFs) play a crucial role in power grid security analysis, planning, and redispatch. Fast calculation of the PTDFs is therefore of great importance. In this paper, we present a non-approximative dual method of computing PTDFs. It uses power flows along topological cycles of the network but still relies on simple matrix algebra. At the core, our method changes the size of the matrix that needs to be inverted to calculate the PTDFs from , where is the number of buses, to , where is the number of lines and is the number of independent cycles (closed loops) in the network while remaining mathematically fully equivalent. For power grids containing a relatively small number of cycles, the method can offer a speedup of numerical calculations.
Autors: Henrik Ronellenfitsch;Marc Timme;Dirk Witthaut;
Appeared in: IEEE Transactions on Power Systems
Publication date: Mar 2017, volume: 32, issue:2, pages: 1007 - 1015
Publisher: IEEE
 
» A Dynamic Real Option-Based Investment Model for Renewable Energy Portfolios
Abstract:
This work proposes a dynamic model to devise the optimal risk-averse investment policy in a portfolio of complementary renewable sources for a generation company in the Brazilian power system. The proposed method merges a static energy-contracting model, based on a hybrid robust-and-stochastic optimization approach, with a mean reverting binomial lattice model for real-option valuation. The proposed merge extends previous works by providing support to risk-averse investment decisions in complementary renewable sources dynamically distributed over time. The most important results of the model are: how much capacity to invest or build from each renewable source, how much to sell from the energy portfolio in bilateral contracts, and the optimal timing to invest. Unlike previous reported works, our model takes into account three classes of uncertainties simultaneously: renewable production of candidate sources and prices in the spot and contract markets. A case study with realistic data from the Brazilian power system is presented to illustrate the value of our model.
Autors: Aderson Campos Passos;Alexandre Street;Luiz Augusto Barroso;
Appeared in: IEEE Transactions on Power Systems
Publication date: Mar 2017, volume: 32, issue:2, pages: 883 - 895
Publisher: IEEE
 
» A Fast Process-Variation-Aware Mask Optimization Algorithm With a Novel Intensity Modeling
Abstract:
With the continuous shrinkage of advanced technology nodes into the sub-16-nm regime, optical proximity correction (OPC) is still the main stream to preserve acceptable wafer image quality under lithographic process variations in the foreseeable future. However, OPC is getting more aggressive to keep pace with advanced technology nodes. This results in complex mask solutions and long computation time. In this paper, we propose a novel-intensity-based OPC algorithm to find mask solutions with minimal edge placement error and process variability band area within a short computation time. This is achieved through exploiting a fast novel intensity estimation model with acceptable estimation accuracy to guide the OPC response including two-fragment shifting, corner hammering, and subresolution assist feature insertion for better convergence. Moreover, our algorithm is extended to satisfy the mask notch rule and reduce shot count for a lower mask manufacturing cost. The experimental results show that our algorithm outperforms recently published algorithms on the public benchmarks.
Autors: Ahmed Awad;Atsushi Takahashi;Satoshi Tanaka;Chikaaki Kodama;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Mar 2017, volume: 25, issue:3, pages: 998 - 1011
Publisher: IEEE
 
» A Faster Algorithm for Enumerating Connected Convex Subgraphs in Acyclic Digraphs
Abstract:
Subgraph enumeration is one of the most crucial steps involved in the custom instruction identification for application-specific instruction set processors. Generating all connected convex subgraphs from an acyclic digraph is a computationally difficult problem. In this letter, we propose a simple and fast algorithm for enumerating all connected convex subgraphs in acyclic digraphs. Experimental results show that our algorithm outperforms the latest algorithm in the literature. We also present a parallel approach for enumerating all connected convex subgraphs using MapReduce. Results for real world benchmarks covering different application domains reveal that the parallel approach can achieve near linear speedup over the sequential approach.
Autors: Shanshan Wang;Chenglong Xiao;Wanjun Liu;
Appeared in: IEEE Embedded Systems Letters
Publication date: Mar 2017, volume: 9, issue:1, pages: 9 - 12
Publisher: IEEE
 
» A Fault-Diagnosis and Fault-Tolerant Control Scheme for Flying Capacitor Multilevel Inverters
Abstract:
The high number of power semiconductors in multilevel converters makes them susceptible to failure. Therefore, one of the main concerns in utilizing multilevel inverters is their reliability. This paper proposes a new simple fault-diagnosis and fault-handling method to increase the robustness and reliability of a flying capacitor multilevel inverter (FCMLI) which is one of the most prominent multilevel inverters. The proposed method is capable of diagnosing failed switch(es) and reconfiguring the switching sequence such that the output voltage is maintained similar to a normal operation condition. The proposed scheme identifies failed switch(es) by using the information about the charging state of the capacitors and the applied switching sequence. After identifying the failed switch(es), the algorithm bypasses the failed switch(es) and converts the control signals of the faulty leg from an M -cell L-level configuration to an (M-F)-cell L -level configuration (where F is the number of failed switches). The most attractive feature of the proposed control scheme is that any number of failed switches can be tolerated, as long as the number of functional switches is higher than the minimum number of cells required to build a full-binary L-level FCMLI. Simulation and experimental results are presented that verify the effectiveness of the proposed method.
Autors: Jalal Amini;Mehrdad Moallem;
Appeared in: IEEE Transactions on Industrial Electronics
Publication date: Mar 2017, volume: 64, issue:3, pages: 1818 - 1826
Publisher: IEEE
 
» A Ferroelectric Nonvolatile Processor with 46 $mu $ s System-Level Wake-up Time and 14 $mu $ s Sleep Time for Energy Harvesting Applications
Abstract:
Nonvolatile processor (NVP) attracts more and more attentions for its immunity to power loss in energy harvesting scenarios. The overall performance of an NVP is determined by its sleep and wake-up speeds, which refer to how fast the NVP can turn itself off and on when a sudden power failure occurs. To the best of our knowledge, this paper is the first work to improve the system-level sleep/wake-up speed of an energy harvesting NVP. A hybrid CMOS/ferroelectric nonvolatile flip-flop (nvFF) and a high-speed voltage detector are designed and integrated in the proposed NVP to jointly minimize its sleep and wake-up time. Measurement results demonstrate wake-up time and sleep time, which is up to 18 and 24 times speedup over existing works. This approach not only improves the robustness of the NVP to power fluctuations but also brings significant advantages for better utilization of harvested energy.
Autors: Fang Su;Yongpan Liu;Yiqun Wang;Huazhong Yang;
Appeared in: IEEE Transactions on Circuits and Systems I: Regular Papers
Publication date: Mar 2017, volume: 64, issue:3, pages: 596 - 607
Publisher: IEEE
 
» A Flexible Continuous-Time $Delta Sigma $ ADC With Programmable Bandwidth Supporting Low-Pass and Complex Bandpass Architectures
Abstract:
A flexible continuous-time modulator that supports both low-pass and complex bandpass (CBP) architectures with the programmable bandwidths of 5 and 10 MHz is presented. By utilizing flexibility into both architectural level and core building blocks, scalable power consumption is obtained for each mode with desired performance. An amplifier topology with active feedforward, antipole splitting, and current reuse techniques is proposed for effective power reduction. A prototyped modulator in a 65-nm CMOS achieves a 65.1-/62.2-dB peak signal-to-noise-plus-distortion ratio (SNDR) with a 5-/10-MHz bandwidth in the LP architecture and a 62.9-/64.1-dB SNDR over a 5-/10-MHz signal band with a tunable center frequency of 4–6 MHz in the CBP architecture, respectively. The figure of merit is 0.21/0.23/0.36/0.24 pJ/conversion step for each mode with a power consumption of 3.1/4.8/4.2/6.3 mW by a 1.2 V supply voltage. The dynamic range is 73/65.8/74.3/74.2 dB. The active area is 0.39 mm2.
Autors: Yang Xu;Xinwang Zhang;Zhihua Wang;Baoyong Chi;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Mar 2017, volume: 25, issue:3, pages: 872 - 880
Publisher: IEEE
 
» A Flexible Voltage Bus Converter for the 48-/12-V Dual Supply System in Electrified Vehicles
Abstract:
Due to an increasing in-vehicle electric load demand, a new 48-V electric system architecture proposed by German premier car manufacturers has been gaining increasing attention recently for electrified vehicles. In this paper, a multiple-voltage bus converter for the 48-V and existing 12-V dual supply system, providing additional flexible dc bus voltages, is proposed. The proposed converter can provide a dual flexible dc voltage bus and an additional dependent voltage bus while simultaneously managing the 12-V supply net using only one single-leg switch pole and a diode. The additional dc voltage buses will provide more options to accommodate variable electric load components in a vehicle, improving their power density. Due to the multiple control objectives, the single-leg pole requires a multimode switching strategy to regulate the additional bus voltages. To improve the onboard vehicle system reliability and performance, an impedance network structure is implemented in the converter to obtain a dead-time-free pulsewidth modulation (PWM). Simulation and experimental results are presented to verify the feasibility and effectiveness of the proposed structure and control method.
Autors: Taehyung Kim;Sangshin Kwak;
Appeared in: IEEE Transactions on Vehicular Technology
Publication date: Mar 2017, volume: 66, issue:3, pages: 2010 - 2018
Publisher: IEEE
 
» A Flow-Level Extension to OMNeT++ for Long Simulations of Large Networks
Abstract:
This letter presents a Flow-Level Extension to OMNeT++ (FLEO) that allows a discrete event simulator to operate on flows of traffic, and so simulate larger networks for longer periods of time for a given set of computation and memory resources compared with packet-based simulation. FLEO simulations of link utilization are accurate to within 0.2% of a packet-based simulation, yet run 30 to 90 times faster than packet-based simulation. These characteristics make it suitable for the simulation of streaming media, which comprises the majority of data usage today, as well as investigation of traffic engineering within a network, for example, using software-defined networking.
Autors: Gilbert Anggono;Tim Moors;
Appeared in: IEEE Communications Letters
Publication date: Mar 2017, volume: 21, issue:3, pages: 496 - 499
Publisher: IEEE
 
» A Framework for Robust Assessment of Power Grid Stability and Resiliency
Abstract:
Security assessment of large-scale, strongly nonlinear power grids containing thousands to millions of interacting components is a computationally expensive task. Targeting at reducing the computational cost, this paper introduces a framework for constructing a robust assessment toolbox that can provide mathematically rigorous certificates for the grids’ stability in the presence of variations in power injections, and for the grids’ ability to withstand a bunch sources of faults. By this toolbox we can “offline” screen a wide range of contingencies or power injection profiles, without reassessing the system stability on a regular basis. In particular, we formulate and solve two novel robust stability and resiliency assessment problems of power grids subject to the uncertainty in equilibrium points and uncertainty in fault-on dynamics. Furthermore, we bring in the quadratic Lyapunov functions approach to transient stability assessment, offering real-time construction of stability/resiliency certificates and real-time stability assessment. The effectiveness of the proposed techniques is numerically illustrated on a number of IEEE test cases.
Autors: Thanh Long Vu;Konstantin Turitsyn;
Appeared in: IEEE Transactions on Automatic Control
Publication date: Mar 2017, volume: 62, issue:3, pages: 1165 - 1177
Publisher: IEEE
 
» A Frequency Stable Volume Integral Equation Method for Anisotropic Scatterers
Abstract:
We introduce a volume integral equation method for the numerical solution of the electromagnetic scattering problem from electrically anisotropic inhomogeneous objects. The problem’s unknown, that is the sum of the conduction and polarization current densities, is decomposed in terms of its loop, star and facet components. Suitable strategies have been implemented to enforce the uniqueness of this discrete representation. Furthermore, through a convenient scaling of the unknowns, we also make the present method immune to the low-frequency breakdown problem, showing its stability regardless of the operating frequency. This approach has been extensively validated against the null-field method by analyzing the scattering from a uniaxial dielectric sphere and a uniaxial dielectric slab and comparing the scattered electric field in both the near and far zones. The condition number of the scattering problem consisting of a slab with an assigned conductivity tensor is also monitored as a function of the exciting frequency.
Autors: Carlo Forestiere;Giovanni Miano;Guglielmo Rubinacci;Antonello Tamburrino;Lalita Udpa;Salvatore Ventre;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Mar 2017, volume: 65, issue:3, pages: 1224 - 1235
Publisher: IEEE
 
» A Frequency-Shift Method to Measure Shear-Wave Attenuation in Soft Tissues
Abstract:
In vivo quantification of shear-wave attenuation in soft tissues may help to better understand human tissue rheology and lead to new diagnostic strategies. Attenuation is difficult to measure in acoustic radiation force elastography because the shear-wave amplitude decreases due to a combination of diffraction and viscous attenuation. Diffraction correction requires assuming a cylindrical wavefront and an isotropic propagation medium, which may not be the case in some applications. In this paper, the frequency-shift method, used in ultrasound imaging and seismology, was adapted for shear-wave attenuation measurement in elastography. This method is not sensitive to diffraction effects. For a linear frequency dependence of the attenuation, a closed-form relation was obtained between the decrease in the peak frequency of the gamma-distributed wave amplitude spectrum and the attenuation coefficient of the propagation medium. The proposed method was tested against a plane-wave reference method in homogeneous agar–gelatin phantoms with 0%, 10%, and 20% oil concentrations, and hence different attenuations of 0.117, 0.202, and 0.292 /Hz, respectively. Applicability to biological tissues was demonstrated with two ex vivo porcine liver samples (0.79 and 1.35 /Hz) and an in vivo human muscle, measured along (0.43 /Hz) and across (1.77 /Hz) the tissue fibers. In all cases, the data supported the assumptions of a gamma-distributed spectrum for the- source and linear frequency attenuation for the tissue. This method provides tissue attenuation, which is relevant diagnostic information to model viscosity, in addition to shear-wave velocity used to assess elasticity. Data processing is simple and could be performed automatically in real time for clinical applications.
Autors: Simon Bernard;Siavash Kazemirad;Guy Cloutier;
Appeared in: IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control
Publication date: Mar 2017, volume: 64, issue:3, pages: 514 - 524
Publisher: IEEE
 
» A Frog-Shaped Linear Piezoelectric Actuator Using First-Order Longitudinal Vibration Mode
Abstract:
A frog-shaped linear piezoelectric actuator was proposed, designed, fabricated, and tested. The proposed actuator only used the first-order longitudinal vibration to generate linear motion, which made the design, optimization, and miniaturization of the actuator more flexible by abbreviating the frequency degeneration. By stimulating the first-order longitudinal vibration, alternate oblique movements are formed on the ends of two driving feet. Meanwhile, an elongating and shortening movement of the whole actuator is generated. When two parallel walls are in contact with the ends of two diving feet and a vertical preload is applied, the vertical components of the alternate oblique movements will overcome the preload, while the horizontal components of the alternate oblique movements and the elongating and shortening movements will together push the actuator into linear motion. Vibration characteristics and alternate oblique movements of the driving feet were investigated by the finite-element method. Experiment tests of vibration characteristics and mechanical output ability were then carried out. The tested resonance frequency and vibration amplitudes agreed well with the calculated ones. The prototype achieved a maximum speed and a thrust of 287 mm/s and 11.8 N, respectively.
Autors: Qiang Zhang;Weishan Chen;Yingxiang Liu;Junkao Liu;Qiang Jiang;
Appeared in: IEEE Transactions on Industrial Electronics
Publication date: Mar 2017, volume: 64, issue:3, pages: 2188 - 2195
Publisher: IEEE
 
» A Fully Integrated Reconfigurable Self-Startup RF Energy-Harvesting System With Storage Capability
Abstract:
This paper introduces a fully integrated RF energy-harvesting system. The system can simultaneously deliver the current demanded by external dc loads and store the extra energy in external capacitors, during periods of extra output power. The design is fabricated in 0.18- CMOS technology, and the active chip area is 1.08 mm2. The proposed self-startup system is reconfigurable with an integrated LC matching network, an RF rectifier, and a power management/controller unit, which consumes 66–157 nW. The required clock generation and the voltage reference circuit are integrated on the same chip. Duty cycle control is used to operate for the low input power that cannot provide the demanded output power. Moreover, the number of stages of the RF rectifier is reconfigurable to increase the efficiency of the available output power. For high available power, a secondary path is activated to charge an external energy storage element. The measured RF input power sensitivity is −14.8 dBm at a 1-V dc output.
Autors: Mohamed A. Abouzied;Krishnan Ravichandran;Edgar Sánchez-Sinencio;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 704 - 719
Publisher: IEEE
 
» A Game-Theoretical Analysis of Wireless Markets Using Network Aggregation
Abstract:
Modeling wireless access and spectrum markets is challenging due to a plethora of technological and economic aspects that affect their performance. This work develops a modeling framework for analysing such markets using network economics, game theory, and queueing networks. The framework models the service selection of users as well as the competition and coalition among providers. It also develops tools and algorithms to analytically compute the Nash equilibriums (NEs) under the presence of discontinuities in the derivatives of the utility functions of providers. The analysis of different market scenarios reveals various interesting trends in the offered prices, market share, and revenue of providers depending on the user utility function, traffic demand, and mobility pattern. It also demonstrates the role of the quality of service (QoS) in the user utility function in reducing the intensity of competition and allowing for higher prices and revenue. However, the analysis of large-scale markets exhibits a high computational complexity. To improve the computational efficiency, we developed a network aggregation methodology based on the theorem of Norton. This aggregation allows the construction of equivalent networks for a specific region of interest, omitting the details of the entire networks. We demonstrate the aggregation algorithm in the context of capacity planning.
Autors: Georgios Fortetsanakis;Ioannis Dimitriou;Maria Papadopouli;
Appeared in: IEEE Transactions on Mobile Computing
Publication date: Mar 2017, volume: 16, issue:3, pages: 602 - 616
Publisher: IEEE
 
» A Gaussian Beam Approximation Approach for Embedding Antennas Into Vector Parabolic Equation-Based Wireless Channel Propagation Models
Abstract:
Vector parabolic equation (VPE) methods have been widely applied to the modeling of radio-wave propagation in tunnel environments, offering high computational efficiency and fidelity. While the propagation environment can be discretized and represented in detail, the representation of radiating sources (such as transmitting antennas) requires the calculation, analytical if possible or numerical via another method such as ray-tracing (RT), of the fields that the sources generate on the initial plane of the VPE model. These initial conditions are necessary for subsequently applying VPE. However, the solutions offered so far compromise either the accuracy or the efficiency of VPE. For example, generating the initial conditions for VPE through RT adds significant computational overhead to the typically fast VPE solver. To address this significant limitation of VPE methods, we introduce a technique that allows one to directly embed antennas into a VPE mesh, via a Gaussian beam approximation of their radiated fields. Hence, the initial conditions for VPE are generated for practical antenna patterns, without invoking other techniques and with no compromise on the inherent efficiency of VPE. Concrete guidelines on how to choose parameters for Gaussian beams are provided. Numerical results are compared to experimental measurements in various tunnel scenarios, demonstrating the validity and usefulness of the technique.
Autors: Xingqi Zhang;Costas D. Sarris;
Appeared in: IEEE Transactions on Antennas and Propagation
Publication date: Mar 2017, volume: 65, issue:3, pages: 1301 - 1310
Publisher: IEEE
 
» A General Construction for PMDS Codes
Abstract:
Partial MDS [(PMDS) also known as maximally recoverable] codes allow for local erasure recovery by utilizing row-wise parities and additional erasure correction through global parities. Recent works on PMDS codes focus on special case parameter settings, and a general construction for PMDS codes is stated as an open problem. This letter provides an explicit construction for PMDS codes for all parameters utilizing concatenation of Gabidulin and MDS codes, a technique originally proposed by Rawat et al. for constructing optimal locally repairable codes. This approach allows for PMDS constructions for any parameters albeit with large field sizes. To lower the field size, a relaxation on the rate requirement is considered, and PMDS codes based on combinatorial designs are constructed.
Autors: Gokhan Calis;O. Ozan Koyluoglu;
Appeared in: IEEE Communications Letters
Publication date: Mar 2017, volume: 21, issue:3, pages: 452 - 455
Publisher: IEEE
 
» A Geometric Programming to Importance Sampling for Power System Reliability Evaluation
Abstract:
A novel Geometric Programming (GP) is presented in the first time by the optimization model of importance sampling parameters (ISP) in Variance Minimization (VM) for importance sampling (IS) of power system reliability evaluation. The key point of the proposed method is that the equality constraints of VM optimization model can be relaxed into inequalities because of its special structure, thus a new GP-VM convex optimization model can be built exactly to solve the difficulty of obtaining the optimal ISP. Numerical results of two test systems verify the effectiveness of the proposed method.
Autors: Chao Yan;Tao Ding;Zhaohong Bie;Xifan Wang;
Appeared in: IEEE Transactions on Power Systems
Publication date: Mar 2017, volume: 32, issue:2, pages: 1568 - 1569
Publisher: IEEE
 
» A GPU-Based Processing Chain for Linearly Unmixing Hyperspectral Images
Abstract:
Linear spectral unmixing is one of the nowadays hottest research topics within the hyperspectral imaging community, being a proof of this fact the vast amount of papers that can be found in the scientific literature about this challenging task. A subset of these works is devoted to the acceleration of previously published unmixing algorithms for application under tight time constraints. For this purpose, hyperspectral unmixing algorithms are typically implemented onto high-performance computing architectures in which the operations involved are executed in parallel, which conducts to a reduction in the time required for unmixing a given hyperspectral image with respect to the sequential version of these algorithms. The speedup factors that can be achieved by means of these high-performance computing platforms heavily depend on the inherent level of parallelism of the algorithms to be executed onto them. However, the majority of the state-of-the-art unmixing algorithms were not originally conceived for being parallelized in an ulterior stage, which clearly restricts the amount of acceleration that can be reached. As far as advanced hyperspectral sensors have increasingly high spatial, spectral, and temporal resolutions, it is hence mandatory to follow a new approach that consists of developing a new class of highly parallel unmixing solutions that can take full advantage of the characteristics of nowadays high-performance computing architectures. This paper represents a step forward toward this direction as it proposes a new parallel algorithm for fully unmixing a hyperspectral image together with its implementation onto two different NVIDIA graphic processing units (GPUs). The results obtained reveal that our proposal is able to unmix hyperspectral images with very different spatial patterns and size better and much faster than the best GPU-based unmixing chains up-to-date published, with independence of the characteristics of the selected GPU.
Autors: Ernestina Martel;Raúl Guerra;Sebastián López;Roberto Sarmiento;
Appeared in: IEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing
Publication date: Mar 2017, volume: 10, issue:3, pages: 818 - 834
Publisher: IEEE
 
» A Grey Wolf-Assisted Perturb & Observe MPPT Algorithm for a PV System
Abstract:
This paper proposes a new hybrid maximum power point tracking (MPPT) algorithm combining grey wolf optimization (GWO) and perturb & observe (P&O) technique for efficient extraction of maximum power from a photovoltaic system subjected to rapid variation of solar irradiance and partial shading conditions. GWO handles the initial stages of MPPT followed by application of the P&O algorithm at the final stage in view of achieving faster convergence to the global peak (GP). This MPPT thus overcomes the computational overhead as encountered in the case of a GWO-based MPPT algorithm reported earlier by Mohanty et al. The idea behind using the hybrid technique is to scale down the search space of GWO which helps to speed up for achieving convergence toward the GP. The proposed MPPT algorithm is first implemented using MATLAB/Simulink and subsequently an experimental setup is prepared for its practical implementation. From the obtained results, it is confirmed that the proposed MPPT provides superior tracking performance in any weather conditions compared to both GWO and PSO+PO-based MPPT algorithms.
Autors: Satyajit Mohanty;Bidyadhar Subudhi;Pravat Kumar Ray;
Appeared in: IEEE Transactions on Energy Conversion
Publication date: Mar 2017, volume: 32, issue:1, pages: 340 - 347
Publisher: IEEE
 
» A Hand-Held Assistant for Semiautomated Percutaneous Needle Steering
Abstract:
Objective: Permanent prostate brachytherapy is an effective and popular treatment modality for prostate cancer in which long needles are inserted into the prostate. Challenges associated with manual needle insertion such as needle deflection limit this procedure to primarily treat the entire prostate gland even for patients with localized cancer. In this paper, we present a new semiautomated hand-held needle steering assistant designed to help surgeons improve needle placement accuracy. Methods: Regular clinical brachytherapy needles are connected to a compact device that the surgeon holds. As the surgeon inserts the needle, the device rotates the needle base on a measured and calculated basis in order to produce a desired trajectory of the needle tip. A novel needle–tissue interaction model and a steering algorithm calculate such control actions based on ultrasound images of the needle in tissue. The assistant can also apply controlled longitudinal microvibrations to the needle that reduce needle–tissue friction. Results: Experimental validation of the proposed system in phantom and ex-vivo biological tissue report an average needle targeting accuracy of 0.33 mm over 72 needle insertions in 12 different experimental scenarios. Conclusion: We introduce a new framework for needle steering in prostate brachytherapy in which the surgeon remains in charge of the needle insertion. The device weighs 160 g, making it easy to incorporate with current insertion techniques. Significance: Expected benefits of the proposed system include more precise needle targeting accuracy, which can result in improved focal treatment of prostate cancer.
Autors: Carlos Rossa;Nawaid Usmani;Ronald Sloboda;Mahdi Tavakoli;
Appeared in: IEEE Transactions on Biomedical Engineering
Publication date: Mar 2017, volume: 64, issue:3, pages: 637 - 648
Publisher: IEEE
 
» A Hidden Markov Model for 3D Catheter Tip Tracking With 2D X-ray Catheterization Sequence and 3D Rotational Angiography
Abstract:
In minimal invasive image guided catheterization procedures, physicians require information of the catheter position with respect to the patient’s vasculature. However, in fluoroscopic images, visualization of the vasculature requires toxic contrast agent. Static vasculature roadmapping, which can reduce the usage of iodine contrast, is hampered by the breathing motion in abdominal catheterization. In this paper, we propose a method to track the catheter tip inside the patient’s 3D vessel tree using intra-operative single-plane 2D X-ray image sequences and a peri-operative 3D rotational angiography (3DRA). The method is based on a hidden Markov model (HMM) where states of the model are the possible positions of the catheter tip inside the 3D vessel tree. The transitions from state to state model the probabilities for the catheter tip to move from one position to another. The HMM is updated following the observation scores, based on the registration between the 2D catheter centerline extracted from the 2D X-ray image, and the 2D projection of 3D vessel tree centerline extracted from the 3DRA. The method is extensively evaluated on simulated and clinical datasets acquired during liver abdominal catheterization. The evaluations show a median 3D tip tracking error of 2.3 mm with optimal settings in simulated data. The registered vessels close to the tip have a median distance error of 4.7 mm with angiographic data and optimal settings. Such accuracy is sufficient to help the physicians with an up-to-date roadmapping. The method tracks in real-time the catheter tip and enables roadmapping during catheterization procedures.
Autors: Pierre Ambrosini;Ihor Smal;Daniel Ruijters;Wiro J. Niessen;Adriaan Moelker;Theo Van Walsum;
Appeared in: IEEE Transactions on Medical Imaging
Publication date: Mar 2017, volume: 36, issue:3, pages: 757 - 768
Publisher: IEEE
 
» A High Dynamic-Range Neural Recording Chopper Amplifier for Simultaneous Neural Recording and Stimulation
Abstract:
Closed-loop neuromodulation is essential for the advance of neuroscience and for administering therapy in patients suffering from drug-resistant neurological conditions. Neural stimulation generates large artifacts at the recording sites, which easily saturate traditional recording front ends. This paper presents a neural recording chopper amplifier capable of handling in-band artifacts up to 40 mVpp while preserving the accompanying small neural signals. New techniques have been proposed that solve the issues of low input impedance and electrode-offset rejection, which enable a DC input impedance of 300 and a dynamic range of 69 dB (200 Hz–5 kHz) and 78 dB (1–200 Hz). Implemented in a 40-nm CMOS process, the prototype occupies an area of 0.071 mm2/channel, and consumes from a 1.2 V supply. The input-referred noise is (200 Hz–20 kHz) and (1–200 Hz). The total harmonic distortion for a 20-mVp input at 1 kHz is −74 dB. This paper improves the linearity by 14–26 dB, dynamic range by 11–28 dB, and input-impedance for chopped front ends by a factor of 11 as compared with the current state of the art, while achieving similar power and noise performance.
Autors: Hariprasad Chandrakumar;Dejan Marković;
Appeared in: IEEE Journal of Solid-State Circuits
Publication date: Mar 2017, volume: 52, issue:3, pages: 645 - 656
Publisher: IEEE
 
» A High-Accuracy Wind Power Forecasting Model
Abstract:
In this letter, a forecasting model consisting of the Gaussian process with a novel composite covariance function for high-accuracy wind power forecasting is presented. The proposed composite covariance function is based on the exploration of joint effects between numerical weather prediction features. The performance of the proposed forecasting model is evaluated using the 2012 global energy forecasting competition wind power forecasting data, and the proposed model outperforms all of the competitors.
Autors: Shengchen Fang;Hsiao-Dong Chiang;
Appeared in: IEEE Transactions on Power Systems
Publication date: Mar 2017, volume: 32, issue:2, pages: 1589 - 1590
Publisher: IEEE
 
» A High-Speed and Power-Efficient Voltage Level Shifter for Dual-Supply Applications
Abstract:
This brief presents a fast and power-efficient voltage level-shifting circuit capable of converting extremely low levels of input voltages into high output voltage levels. The efficiency of the proposed circuit is due to the fact that not only the strength of the pull-up device is significantly reduced when the pull-down device is pulling down the output node, but the strength of the pull-down device is also increased using a low-power auxiliary circuit. Postlayout simulation results of the proposed circuit in a 0.18- technology demonstrate a total energy per transition of 157 fJ, a static power dissipation of 0.3 nW, and a propagation delay of 30 ns for input frequency of 1 MHz, low supply voltage level of V, and high supply voltage level of V.
Autors: Seyed Rasool Hosseini;Mehdi Saberi;Reza Lotfi;
Appeared in: IEEE Transactions on Very Large Scale Integration Systems
Publication date: Mar 2017, volume: 25, issue:3, pages: 1154 - 1158
Publisher: IEEE
 

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