|Datasheet||Download TDA8005AG datasheet
Preliminary specification File under Integrated Circuits, IC17 1998 Mar 20
FEATURES Smart card supply (5 and 20 mA maximum with controlled rise and fall times) Smart card clock generation (up to 8 MHz), with two times synchronous frequency doubling Clock STOP HIGH, clock STOP LOW or 1.25 MHz (from internal oscillator) for cards power-down mode Specific UART on I/O for automatic direct/inverse convention settings and error management at character level Automatic activation and deactivation sequences through an independent sequencer Supports the protocol 0 in accordance with ISO 7816 GSM11.11 requirements (Global System for Mobile communication); approved for Final GSM11.11 Test Approval (FTA) Several analog options are available for different applications: doubler or tripler DC-to-DC converter, card presence, active HIGH or LOW, threshold voltage supervisor, etc. Overloads and take-off protections Current limitations in the event of short-circuit Special circuitry for killing spikes during power-on or off Supply supervisor Step-up converter (supply voltage from to 6 V) Power-down and sleep mode for low power consumption Enhanced ElectroStatic Discharge (ESD) protections on card side (6 kV minimum) ORDERING INFORMATION TYPE NUMBER TDA8005AG TDA8005AH PACKAGE NAME LQFP64 QFP44 DESCRIPTION
Control and communication through a standard RS232 full-duplex interface Optional additional I/O ports for: keyboard LEDs display etc. P80CL51 microcontroller core with 4-kbyte ROM and 256-byte RAM. APPLICATIONS Portable smart card readers for protocol = 0 GSM mobile phones. GENERAL DESCRIPTION The is a low-cost card interface for portable smart card readers. Controlled through a standard serial interface, it takes care of all ISO 7816 and GSM11.11 requirements for both 5 and 3 V cards. It gives the card and the set a very high level of security, due to its special hardware against ESD, short-circuiting, power failure, etc. Its integrated step-up converter allows operation within a supply voltage range 6 V. The very low power consumption in power-down and sleep modes saves battery power. Development tools, application report and support (hardware and software) are available.
plastic low profile quad flat package; 64 leads; body mm plastic quad flat package; 44 leads (lead length 1.3 mm); body mm
QUICK REFERENCE DATA SYMBOL VDD IDD(pd) IDD(sm) PARAMETER supply voltage supply current in power-down mode supply current in sleep mode CONDITIONS doubler and tripler option VDD 5 V; card inactive card powered but clock stopped; no load doubler option tripler option IDD(om) VCC supply current in operating mode card supply voltage MIN. 2.5 -
- unloaded; fXTAL = 13 MHz; fµC = 6.5 MHz; fcard = 3.25 MHz 5 V card no load static load dynamic load 200 nF capacitor 3 V card no load static load dynamic load 200 nF capacitorcard supply current slew rate on VCC (rise and fall)
operating limitation maximum load capacitor 250 nF (including typical 200 nF decoupling)
deactivation sequence duration activation sequence duration crystal frequency operating ambient temperature
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